Presentation 2015-03-04
LSI implementation of FEC for high-speed optical transmission
Koji MIYANOHANA, Susumu HIRANO, Hideo YOSHIDA, Yoshikuni MIYATA, Kenya SUGIHARA, Kazuo KUBO, Yoshiaki KONISHI, Kiyoshi ONOHARA, Noriyuki MINEGISHI, Takashi SUGIHARA,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Implementation of FEC (Forward Error Correction) for 100Gbps optical transmission is essential to use of advanced process technology because of extremely large circuit, but leakage current and chip variation are large on the process. We need to study feasibility whether traditional design flow and resources can be applied. To solve these problem, we have developed a new design strategy to integrate in a LSI and to reduce circuit size and power consumption. As we have determined optimum operating frequency, and explored hierarchical design architecture to reduce the number of ports, and automated module insertion for the design for testability easier and established logical synthesis technique to reduce circuit scale, we have achieved the LSI circuit size and power consumption.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) LSI / FEC / Optical transmission
Paper # VLD2014-178
Date of Issue

Conference Information
Committee VLD
Conference Date 2015/2/23(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) LSI implementation of FEC for high-speed optical transmission
Sub Title (in English)
Keyword(1) LSI
Keyword(2) FEC
Keyword(3) Optical transmission
1st Author's Name Koji MIYANOHANA
1st Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation()
2nd Author's Name Susumu HIRANO
2nd Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation
3rd Author's Name Hideo YOSHIDA
3rd Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation
4th Author's Name Yoshikuni MIYATA
4th Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation
5th Author's Name Kenya SUGIHARA
5th Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation
6th Author's Name Kazuo KUBO
6th Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation
7th Author's Name Yoshiaki KONISHI
7th Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation
8th Author's Name Kiyoshi ONOHARA
8th Author's Affiliation Communication Networks Center, Mitsubishi Electric Corporation
9th Author's Name Noriyuki MINEGISHI
9th Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation
10th Author's Name Takashi SUGIHARA
10th Author's Affiliation Information Technology R&D Center, Mitsubishi Electric Corporation
Date 2015-03-04
Paper # VLD2014-178
Volume (vol) vol.114
Number (no) 476
Page pp.pp.-
#Pages 6
Date of Issue