| Presentation | 2015-03-03 A Design of FIR filters using High Level Synthesis : A automated design of FIR filters Ryo YAMAMOTO, Naoya OKADA, Noriyuki MINEGISHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently a study has reported that algorithm designers implement a image processing FPGA using a High Level Synthesis tool. It leads low cost FPGA by optimizing circuits on a FPGA at the algorithm level. In the case of a digital signal FPGA, however, it needs some design techniques at the circuit's implementation level to realize low cost FPGA. FIR filters are embedded in many digital signal FPGAs. A FIR circuit volume will be twice times larger if a designer does not optimize circuits at the circuit's implementation level that is inner structures of FIR circuit. It is difficult for algorithm designers to optimize circuits at the circuit's implementation level even if they use High Level Synthesis tool. This paper proposes a system of the automated generation of FIR circuits. This system can generate a FIR circuit as input FIR specifications. A designer who has no experience as designing RTL can get a FIR circuit that is optimized circuit volume. A circuit performance that generated automatically by this system is as almost same as that a RTL designer implements it. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FIR / High Level Synthesis / SystemC |
| Paper # | VLD2014-166 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2015/2/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Design of FIR filters using High Level Synthesis : A automated design of FIR filters |
| Sub Title (in English) | |
| Keyword(1) | FIR |
| Keyword(2) | High Level Synthesis |
| Keyword(3) | SystemC |
| 1st Author's Name | Ryo YAMAMOTO |
| 1st Author's Affiliation | Mitsubishi Electric Corporation() |
| 2nd Author's Name | Naoya OKADA |
| 2nd Author's Affiliation | Mitsubishi Electric Corporation |
| 3rd Author's Name | Noriyuki MINEGISHI |
| 3rd Author's Affiliation | Mitsubishi Electric Corporation |
| Date | 2015-03-03 |
| Paper # | VLD2014-166 |
| Volume (vol) | vol.114 |
| Number (no) | 476 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |