| Presentation | 2015-02-13 A Hardware Trojan Circuit Detection Method Based on Information of Nontransition Lines Tomohiro BOUYASHIKI, Toshinori HOSOKAWA, Masayoshi YOSHIMURA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently, the increased utilization of outsourcing services for a part of designing and manufacturing LSIs can reduce the reliability of LSIs. Hardware Trojan circuits are malicious logics which were inserted by attackers. Test patterns which are not used on normal operation activate Trojan circuits. The activated Trojan circuits cause unusual behaviors, such as the secret information leakages. It is difficult to detect Trojan circuits which could not be activated by patterns of the normal functions. In this paper, we propose a Trojan circuit detection method based on the information of non-transition lines. The proposed method is one to detect Trojan circuits inserted at logic design level. In this paper, we assume that Trojan circuits were inserted at logic design level by attackers in an outsourcing company. The proposed method has three steps. In the first step, non-transition lines in circuits designed in the outsourcing company are identified by using logic simulation with test patterns for functional verification and testing. The second step generates test patterns which invert non-transition lines. The third step compares the output responses of original circuits at RT level and those of circuits designed by the outsourcing company by using logic simulation with the generated patterns. If there is a difference between those output responses, we can identify the inverted non-transition lines as a part of Trojan circuits. We show that the proposed method can detect Trojan circuits on handmade for AES encryption circuits and Trojan benchmark circuits distributed on the "trust-Hub". |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | hardware Trojan / malicious line / design for testability / security |
| Paper # | DC2014-81 |
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| Committee | DC |
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| Conference Date | 2015/2/6(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Hardware Trojan Circuit Detection Method Based on Information of Nontransition Lines |
| Sub Title (in English) | |
| Keyword(1) | hardware Trojan |
| Keyword(2) | malicious line |
| Keyword(3) | design for testability |
| Keyword(4) | security |
| 1st Author's Name | Tomohiro BOUYASHIKI |
| 1st Author's Affiliation | Graduate School of Industrial Technology, Nihon University() |
| 2nd Author's Name | Toshinori HOSOKAWA |
| 2nd Author's Affiliation | College of Faculty of Computer Science and Engineering, Kyoto Sangyo University |
| 3rd Author's Name | Masayoshi YOSHIMURA |
| 3rd Author's Affiliation | College of Faculty of Computer Science and Engineering, Kyoto Sangyo University |
| Date | 2015-02-13 |
| Paper # | DC2014-81 |
| Volume (vol) | vol.114 |
| Number (no) | 446 |
| Page | pp.pp.- |
| #Pages | 6 |
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