| Presentation | 2015-02-13 Study on Reliability Improvements of MLC PCM by Threshold Modification Shinya Nakano, Masayuki Arai, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Multi-level cell phase change memory (MLC PCM) has received a lot of attention as one of the emerging volatile memory devices which have high write speed and high data density. One of the challenges on MLC PCM is unavoidable bit error rate due to noise-induced resistance fluctuation occurring at writing of the data. In this study, aiming to reliability of data stored in MLC PCM cells, we discuss a scheme combining gray coding and threshold modification. Applying gray coding can suppress the effect of bit error into just one bit. Also, by modifying the conventional uniform resistance distribution into asymmetric ones, we aim to differentiate levels of resistance values in terms of bit error rate, resulting in total reduction of bit error rate. Furthermore, considering distribution of resistance fluctuation where standard deviation increases as resistance value increases, we apply the same tendency into threshold between resistance levels being set, aiming. We evaluate the proposed scheme in terms of bit error rate, calculating the probability of occurrence of given number of bit errors. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | phase change memory / multi-level cell phase change memory / PCM / MLC PCM / threshold modification |
| Paper # | DC2014-79 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2015/2/6(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Study on Reliability Improvements of MLC PCM by Threshold Modification |
| Sub Title (in English) | |
| Keyword(1) | phase change memory |
| Keyword(2) | multi-level cell phase change memory |
| Keyword(3) | PCM |
| Keyword(4) | MLC PCM |
| Keyword(5) | threshold modification |
| 1st Author's Name | Shinya Nakano |
| 1st Author's Affiliation | College of Industrial Technology, Nihon University() |
| 2nd Author's Name | Masayuki Arai |
| 2nd Author's Affiliation | College of Industrial Technology, Nihon University |
| Date | 2015-02-13 |
| Paper # | DC2014-79 |
| Volume (vol) | vol.114 |
| Number (no) | 446 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |