| Presentation | 2015-01-30 MieruSys Project : Developing an Advanced Computer System with Multiple FPGAs Yuki MATSUDA, Eri OGAWA, Tomohiro MISONO, Naoki FUJIEDA, Shuichi ICHIKAWA, Kenji KISE, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper describes the design and current development of MieruSys project which develops a future computer system with multiple FPGAs. With the performance improvement of FPGA due to scale of process technology, FPGA has become gradually used in the field where ASIC was employed previously. Also, user's demands for computer systems become diversified and application specific accelerators are becoming needed. In this MieruSys project, we design the computer components with multiple FPGAs, connect them with mesh network, and develop a whole computer system. We name this computer system MieruSys. Using mesh network can allow users to add accelerator components easily, and achieve high scalability. MieruSys is in the early development stage, and currently we have MieruSys ver.0.1 which can run Linux and FreeDOS on an FPGA board. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Multiple FPGAs / Mesh / Computer System / OS |
| Paper # | VLD2014-146,CPSY2014-155,RECONF2014-79 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2015/1/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | MieruSys Project : Developing an Advanced Computer System with Multiple FPGAs |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Multiple FPGAs |
| Keyword(3) | Mesh |
| Keyword(4) | Computer System |
| Keyword(5) | OS |
| 1st Author's Name | Yuki MATSUDA |
| 1st Author's Affiliation | Graduate School of Information Science and Engineering, Tokyo Institute of Technology() |
| 2nd Author's Name | Eri OGAWA |
| 2nd Author's Affiliation | Department of Computer Science, Tokyo Institute of Technology |
| 3rd Author's Name | Tomohiro MISONO |
| 3rd Author's Affiliation | Department of Computer Science, Tokyo Institute of Technology |
| 4th Author's Name | Naoki FUJIEDA |
| 4th Author's Affiliation | Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology |
| 5th Author's Name | Shuichi ICHIKAWA |
| 5th Author's Affiliation | Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology |
| 6th Author's Name | Kenji KISE |
| 6th Author's Affiliation | Graduate School of Information Science and Engineering, Tokyo Institute of Technology |
| Date | 2015-01-30 |
| Paper # | VLD2014-146,CPSY2014-155,RECONF2014-79 |
| Volume (vol) | vol.114 |
| Number (no) | 428 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |