Presentation 2015-01-29
FPGA Implementation of a High Time Resolution Signal Generation Circuit for PWM
Shun KASHIWAGI, Daiki MITSUTAKE, Hironobu TANIGUCHI, Yuichiro SHIBATA, Kiyoshi OGURI, Hidenori MARUTA, Fujio KUROKAWA,
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Abstract(in English) Recently, high-frequency digitally controlled switching power supplies have received increasing attention in the context of energy saving for electronic equipments. Digitally controlled switching power supplies using FPGAs can perform real-time effective control for voltage changes, by making the best use of high-speed parallel arithmetic circuits. On the other hand, one of the challenges for high-frequency control is to improve time resolution of PWM control while alleviating FPGA resource utilization. This paper shows a novel PWM signal generation circuit with an SerDes primitive for parallel-serial conversion and an ODELAYE2 primitive for fine grained adjustment of a delay quantity. Empirical evaluation results reveal that the proposed circuit can control the duration of the PWM signal in units of approximately 0.08ns and achieves preferable linearity of the delay. The required hardware amount is also small: 37 slices, 63 flip-flops, and 98 LUTs are utilized, respectively.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / Switching Power Supply / PWM Control / odelay / SerDes
Paper # VLD2014-125,CPSY2014-134,RECONF2014-58
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Conference Information
Committee RECONF
Conference Date 2015/1/22(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) FPGA Implementation of a High Time Resolution Signal Generation Circuit for PWM
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Switching Power Supply
Keyword(3) PWM Control
Keyword(4) odelay
Keyword(5) SerDes
1st Author's Name Shun KASHIWAGI
1st Author's Affiliation Nagasaki University()
2nd Author's Name Daiki MITSUTAKE
2nd Author's Affiliation Nagasaki University
3rd Author's Name Hironobu TANIGUCHI
3rd Author's Affiliation Nagasaki University
4th Author's Name Yuichiro SHIBATA
4th Author's Affiliation Nagasaki University
5th Author's Name Kiyoshi OGURI
5th Author's Affiliation Nagasaki University
6th Author's Name Hidenori MARUTA
6th Author's Affiliation Nagasaki University
7th Author's Name Fujio KUROKAWA
7th Author's Affiliation Nagasaki University
Date 2015-01-29
Paper # VLD2014-125,CPSY2014-134,RECONF2014-58
Volume (vol) vol.114
Number (no) 428
Page pp.pp.-
#Pages 6
Date of Issue