Presentation 2015-01-29
Circuit Design and Valuation of Reconfigurable Logic Circuit
Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) The promising candidates for reconfigurable logic one Double Gate MOSFET and CNTFET. In the paper circuit design of reconfigurable dynamic and static logic based on double gate MOSFETs and CNTFET have been newly described. Both the number of transistors and pattern area have been estimated.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Reconfigurable / Double Gate MOSFET / CNTFET / Logic Circuit / Dynamic Circuit / Static Circuit / Pattern area
Paper # VLD2014-119,CPSY2014-128,RECONF2014-52
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Conference Information
Committee RECONF
Conference Date 2015/1/22(1days)
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Paper Information
Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Circuit Design and Valuation of Reconfigurable Logic Circuit
Sub Title (in English)
Keyword(1) Reconfigurable
Keyword(2) Double Gate MOSFET
Keyword(3) CNTFET
Keyword(4) Logic Circuit
Keyword(5) Dynamic Circuit
Keyword(6) Static Circuit
Keyword(7) Pattern area
1st Author's Name Junki Kato
1st Author's Affiliation Shonan Institute of Technology()
2nd Author's Name Shigeyoshi Watanabe
2nd Author's Affiliation Shonan Institute of Technology
3rd Author's Name Hiroshi Ninomiya
3rd Author's Affiliation Shonan Institute of Technology
4th Author's Name Manabu Kobayashi
4th Author's Affiliation Shonan Institute of Technology
5th Author's Name Yasuyuki Miura
5th Author's Affiliation Shonan Institute of Technology
Date 2015-01-29
Paper # VLD2014-119,CPSY2014-128,RECONF2014-52
Volume (vol) vol.114
Number (no) 428
Page pp.pp.-
#Pages 6
Date of Issue