Presentation | 2015-01-29 NoC Architecture with Priority-based Packet Overtaking and Resource Control Shuhei OTSUKI, Keigo MIZOTANI, Masayoshi TAKASU, Daiki YAMAZAKI, Nobuyuki YAMASAKI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | With the recent advances in semiconductor technology, many transistors have been integrated into a single chip and Chip-Multiprocessors (CMPs) are common today. However, the number of cores in them has been increasing and it is difficult to support them with the traditional common bus. To solve this problem, Network-on-Chips (NoCs) have been researched in recent years. The load sharing by routing can reduce the transfer delay of packets and improve the performance of NoCs. However, this technique faces the limitation on constraints of the mounting area of routers. In this paper, we add a priority to a packet header of NoCs. We implemented an on-chip router with a function of priority-based packet overtaking. In addition, we implemented the mechanism to prevent resource occupation caused by priority control. Evaluation results show that the effectiveness of the priority-based packet overtaking. They also show that transfer latency of low-priority packets can be reduced by up to 7.7% while maintaining that of high-priority packets by resource control. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Priority-based Packet Overtaking / Resource Control / Network-on-Chip |
Paper # | VLD2014-117,CPSY2014-126,RECONF2014-50 |
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Conference Information | |
Committee | RECONF |
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Conference Date | 2015/1/22(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Registration To | Reconfigurable Systems (RECONF) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | NoC Architecture with Priority-based Packet Overtaking and Resource Control |
Sub Title (in English) | |
Keyword(1) | Priority-based Packet Overtaking |
Keyword(2) | Resource Control |
Keyword(3) | Network-on-Chip |
1st Author's Name | Shuhei OTSUKI |
1st Author's Affiliation | Faculty of Science and Engineering, Keio University() |
2nd Author's Name | Keigo MIZOTANI |
2nd Author's Affiliation | Graduate School of Science and Technology, Keio University |
3rd Author's Name | Masayoshi TAKASU |
3rd Author's Affiliation | Graduate School of Science and Technology, Keio University |
4th Author's Name | Daiki YAMAZAKI |
4th Author's Affiliation | Sony Corporation |
5th Author's Name | Nobuyuki YAMASAKI |
5th Author's Affiliation | Faculty of Science and Engineering, Keio University |
Date | 2015-01-29 |
Paper # | VLD2014-117,CPSY2014-126,RECONF2014-50 |
Volume (vol) | vol.114 |
Number (no) | 428 |
Page | pp.pp.- |
#Pages | 6 |
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