Presentation 2015-01-29
Turbo Boost Router : An On-Chip Router Supporting Deterministic and Adaptive Routings
Natsuki HOMMA, Go MATSUMURA, Michihiro KOIBUCHI, Hediharu AMANO, Hiroki MATSUTANI,
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Abstract(in English) In this paper, we propose Turbo Boost Router, in which an adaptive routing is used when an offered workload is high, while a deterministic routing is used for a lower workload. An adaptive routing typically requires more complicated allocator logic than that of a deterministic routing, resulting in a longer critical path delay. Thus, when we implement both the adaptive routing and deterministic routing in the same router, its maximum operating frequency is limited by the critical path delay of the adaptive routing allocator. In Turbo Boost Router, a higher supply voltage than a normal one is supplied to only the adaptive routing allocator (normal voltage is supplied to the other components) only when an adaptive routing is used so as not to lower the maximum operating frequency compared to the deterministic router. In this paper, the concept of Turbo Boost Router is evaluated with Fujitsu 65nm technology. With a normal workload, 0.8V is supplied to Turbo Boost Router for a deterministic routing, while 1.3V is supplied to the allocator for an adaptive routing when a network congestion is detected. Circuit-level evaluation results show that it can use an adaptive routing without lowering the operating frequency.
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Paper # VLD2014-116,CPSY2014-125,RECONF2014-49
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Committee RECONF
Conference Date 2015/1/22(1days)
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Language JPN
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Title (in English) Turbo Boost Router : An On-Chip Router Supporting Deterministic and Adaptive Routings
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1st Author's Name Natsuki HOMMA
1st Author's Affiliation Faculty of Science and Technology, Keio University()
2nd Author's Name Go MATSUMURA
2nd Author's Affiliation Graduate School of Science and Technology, Keio University
3rd Author's Name Michihiro KOIBUCHI
3rd Author's Affiliation National Institute of Informatics
4th Author's Name Hediharu AMANO
4th Author's Affiliation Faculty of Science and Technology, Keio University:National Institute of Informatics
5th Author's Name Hiroki MATSUTANI
5th Author's Affiliation Faculty of Science and Technology, Keio University:National Institute of Informatics:PRESTO, Japan Science and Technology Agency
Date 2015-01-29
Paper # VLD2014-116,CPSY2014-125,RECONF2014-49
Volume (vol) vol.114
Number (no) 428
Page pp.pp.-
#Pages 6
Date of Issue