| Presentation | 2015-01-29 An Online Outlier Detector for FPGA NICs Ami HAYASHI, Yuta TOKUSASHI, Hiroki MATSUTANI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | As the information communication technology and sensing technology advance, sensor data stream continuously grows in size, which demands a high throughput outlier detection that efficiently identifies data items which do not conform to an expected pattern from such big data. In this paper, a simple outlier detection mechanism is implemented on an FPGA network interface card (FPGA NIC) that equips four 10Gbit Ethernet interfaces. More specifically, an outlier detection hardware based on Mahalanobis distance is implemented on the FPGA NIC. Sensor data packets that contain only normal values are discarded by the FPGA NIC, while those contain anomaly values are received for the upper layers, such as applications. The outlier detection mechanism is pipelined with five stages, and a variance-covariance matrix is computed by software and provided to the FPGA NIC in a certain interval. As data sets without any interests are filtered by the FPGA NIC, workload of network protocol stack is reduced, and more sensor data can be processed. Evaluation results using NetFPGA-10G board show that the outlier detection mechanism can process 14M samples per a second, which achieves up to 7.73Gbps in throughput. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Outlier detection / FPGA NIC / Stream data |
| Paper # | VLD2014-115,CPSY2014-124,RECONF2014-48 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2015/1/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Online Outlier Detector for FPGA NICs |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Outlier detection |
| Keyword(3) | FPGA NIC |
| Keyword(4) | Stream data |
| 1st Author's Name | Ami HAYASHI |
| 1st Author's Affiliation | Faculty of Science and Technology, Keio University() |
| 2nd Author's Name | Yuta TOKUSASHI |
| 2nd Author's Affiliation | Graduate School of Science and Technology, Keio University |
| 3rd Author's Name | Hiroki MATSUTANI |
| 3rd Author's Affiliation | Faculty of Science and Technology, Keio University:PRESTO, Japan Science and Technology Agency:National Institute of Informatics |
| Date | 2015-01-29 |
| Paper # | VLD2014-115,CPSY2014-124,RECONF2014-48 |
| Volume (vol) | vol.114 |
| Number (no) | 428 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |