Presentation	2014-12-12 Interface Characterization of 4H-SiC MOSFETs by Single Pulse I_d-V_ Measurements Kosuke ISONO, Hiroshi YANO,
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Abstract(in English)	SiC MOSFETs have suffered from issues such as threshold voltage instability and low channel mobility due to high interface trap density. Generally, I_d-V_ characteristics of MOSFETs are measured by applying DC voltage to the gate electrode. It has been pointed out that the electron trapping at the interface or oxide defects during electrical measurements brings fluctuations in electrical properties. In this work, we evaluated SiC MOS interface properties by using single pulse I_d-V_ measurements, which enable to measure I_d-V_ characteristics during rise and fall times of the single pulse and evaluate the drain current decrement.
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Keyword(in English)	4H-SiC / MOS / interface characterization / single pulse I_d-V_
Paper #	EID2014-34,SDM2014-129
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Committee	EID
Conference Date	2014/12/5(1days)
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Registration To	Electronic Information Displays (EID)
Language	JPN
Title (in Japanese)	(See Japanese page)
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Title (in English)	Interface Characterization of 4H-SiC MOSFETs by Single Pulse I_d-V_ Measurements
Sub Title (in English)
Keyword(1)	4H-SiC
Keyword(2)	MOS
Keyword(3)	interface characterization
Keyword(4)	single pulse I_d-V_
1st Author's Name	Kosuke ISONO
1st Author's Affiliation	Nara Institute of Science and Technology()
2nd Author's Name	Hiroshi YANO
2nd Author's Affiliation	University of Tsukuba
Date	2014-12-12
Paper #	EID2014-34,SDM2014-129
Volume (vol)	vol.114
Number (no)	359
Page	pp.pp.-
#Pages	5
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