Presentation 2014-12-12
Low-Temperature CLC Poly-Si TFTs with Sputtered HfO_2 Gate Dielectric Layer
Tatsuya MEGGURO, Akito HARA,
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Abstract(in English) To achieve high performance low-temperature (LT) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs), high-k gate dielectric of sputtered HfO_2 was combined with high-quality lateral large-grained poly-Si thin film fabricated by continuous-wave laser lateral crystallization (CLC). The CET obtained from split CV method indicates 11 nm and HfO_2 gate dielectric shows dielectric constant of 15. Field-effect mobility and S.S. of fabricated CLC LT poly-Si TFTs are 160 cm^2/Vs and 200 mV/dec, respectively. Furthermore, drain current of the TFT was about 4 times higher than that of TFT with SiO_2 gate dielectric. This result demonstrates feasibility of high-k CLC LT poly-Si TFTs
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Keyword(in English) Thin film transistor / Low-temperature poly-Si TFT / Laser crystallization / SiO_2 / Al_2O_3 / HfO_2
Paper # EID2014-23,SDM2014-118
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Committee EID
Conference Date 2014/12/5(1days)
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Language JPN
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Title (in English) Low-Temperature CLC Poly-Si TFTs with Sputtered HfO_2 Gate Dielectric Layer
Sub Title (in English)
Keyword(1) Thin film transistor
Keyword(2) Low-temperature poly-Si TFT
Keyword(3) Laser crystallization
Keyword(4) SiO_2
Keyword(5) Al_2O_3
Keyword(6) HfO_2
1st Author's Name Tatsuya MEGGURO
1st Author's Affiliation Faculty of Engineering, Tohoku-Gakuin University()
2nd Author's Name Akito HARA
2nd Author's Affiliation Faculty of Engineering, Tohoku-Gakuin University
Date 2014-12-12
Paper # EID2014-23,SDM2014-118
Volume (vol) vol.114
Number (no) 359
Page pp.pp.-
#Pages 4
Date of Issue