| Presentation | 2014-12-19 Studies on Reliability Evaluation Techniques for Triple Register Circuits Naoki MIDORIKAWA, Muneyuki NAKAMURA, Aromhack SAYSANASONGKHAM, Kazuya SAKAI, Satoshi FUKUMOTO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper discusses the reliability evaluation technique for the triple register circuit which our research group had proposed. We firstly describe the summary of the triple register circuit. Secondary, the evaluation model by discrete time Markov chain is explained for calculating the numerical results within the practical time cost. Thus, we present the simulation on the basis of circuit information about the combinational circuit block in the target sequential one to estimate the transition probabilities of the Markov chain. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | transient fault / triple register circuit / reliability evaluation |
| Paper # | DC2014-72 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2014/12/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Studies on Reliability Evaluation Techniques for Triple Register Circuits |
| Sub Title (in English) | |
| Keyword(1) | transient fault |
| Keyword(2) | triple register circuit |
| Keyword(3) | reliability evaluation |
| 1st Author's Name | Naoki MIDORIKAWA |
| 1st Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University() |
| 2nd Author's Name | Muneyuki NAKAMURA |
| 2nd Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University |
| 3rd Author's Name | Aromhack SAYSANASONGKHAM |
| 3rd Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University |
| 4th Author's Name | Kazuya SAKAI |
| 4th Author's Affiliation | Graduate School of System Design, Tokyo Metropolitan University |
| 5th Author's Name | Satoshi FUKUMOTO |
| 5th Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University |
| Date | 2014-12-19 |
| Paper # | DC2014-72 |
| Volume (vol) | vol.114 |
| Number (no) | 384 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |