| Presentation | 2014-11-27 Timing-Test Scheduling for PDE Tuning Considering Multiple-Path Testability Mineo KANEKO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | μ-margin timing test is originally proposed for Post Silicon Skew tuning considering run-time timing margin. In this tuning scheme, timing test is applied with arranging the original PDE setting ("PDE design-setting") into another setting named "PDE test-setting" which creates more severe timing situation than the original PDE design setting. For a given set of timing constraints to be tested, multiple PDE test-setting patterns are needed in general, and hence the minimization of the number of PDE test-setting patterns to cover all timing tests becomes one of key issues of skew tuning based on μ-margin timing test. In this report, we extend the previous work to timing test considering multiple-path testability, and propose a cost efficient μ-margin timing test considering multiple-path sensitization. First, we define the compatibility of timing test vectors, and then the problem of minimizing PDE test-setting patterns has been reduced into the clique partitioning on the compatibility relation among test vectors. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Delay variation / timing skew / delay test / setup and hold / sensitization |
| Paper # | VLD2014-94,DC2014-48 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2014/11/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Timing-Test Scheduling for PDE Tuning Considering Multiple-Path Testability |
| Sub Title (in English) | |
| Keyword(1) | Delay variation |
| Keyword(2) | timing skew |
| Keyword(3) | delay test |
| Keyword(4) | setup and hold |
| Keyword(5) | sensitization |
| 1st Author's Name | Mineo KANEKO |
| 1st Author's Affiliation | Graduate School of Information Science, Japan Advanced Institute of Science and Technology() |
| Date | 2014-11-27 |
| Paper # | VLD2014-94,DC2014-48 |
| Volume (vol) | vol.114 |
| Number (no) | 329 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |