| Presentation | 2014-11-26 Technology Mapping Method for Low Power Consumption and High Performance in General-Synchronous Framework Junki KAWAGUCHI, Yukihide KOHIRA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In general-synchronous framework, in which the clock is distributed periodically to each register but not necessarily simultaneously, circuit performances are expected to be improved compared to complete-synchronous framework, in which the clock is distributed periodically and simultaneously to each register. To improve the circuit performances more, logic circuit synthesis for general-synchronous framework is required. In this paper, under the assumption that any clock schedule is realized by an ideal clock distribution circuit, when two or more cell libraries can be used, a technology mapping method which assigns cells of gates of the given logic circuit by using integer linear programming is proposed. In experiments, we show the effectiveness of the proposed technology mapping method. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | General-Synchronous Framework / Technology Mapping / Integer Linear Programming |
| Paper # | VLD2014-83,DC2014-37 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2014/11/19(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Technology Mapping Method for Low Power Consumption and High Performance in General-Synchronous Framework |
| Sub Title (in English) | |
| Keyword(1) | General-Synchronous Framework |
| Keyword(2) | Technology Mapping |
| Keyword(3) | Integer Linear Programming |
| 1st Author's Name | Junki KAWAGUCHI |
| 1st Author's Affiliation | School of Computer Science, the University of Aizu() |
| 2nd Author's Name | Yukihide KOHIRA |
| 2nd Author's Affiliation | School of Computer Science, the University of Aizu |
| Date | 2014-11-26 |
| Paper # | VLD2014-83,DC2014-37 |
| Volume (vol) | vol.114 |
| Number (no) | 329 |
| Page | pp.pp.- |
| #Pages | 6 |
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