| Presentation | 2014-11-26 Design of Flip-Flop with Timing Error Tolerance Taito SUZUKI, Youhua SHI, Nozomu TOGAWA, Kimiyoshi USAMI, Masao YANAGISAWA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Under the influence of the miniaturization of the integrated circuit, the variation of the operation condition of the circuit becomes bigger, and margins of the supply voltage and the clock frequency necessary for a design increase. For the mitigation of the margin, the structure of the circuit with the timing error tolerance is studied flourishingly. In this paper, we propose two new Time Borrowing Flip-Flops (TBFF) in transistor level to realize timing error tolerance by switching from flip-flop to latch dynamically. HSPICE simulation results show that the proposed TBFF can achieve up to 28.1% power reduction when compared with existing works. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | flip-flop / PVT variation / safety margin / time-borrowing / timing error |
| Paper # | VLD2014-79,DC2014-33 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2014/11/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of Flip-Flop with Timing Error Tolerance |
| Sub Title (in English) | |
| Keyword(1) | flip-flop |
| Keyword(2) | PVT variation |
| Keyword(3) | safety margin |
| Keyword(4) | time-borrowing |
| Keyword(5) | timing error |
| 1st Author's Name | Taito SUZUKI |
| 1st Author's Affiliation | Grad. of Science and Engineering, Waseda University() |
| 2nd Author's Name | Youhua SHI |
| 2nd Author's Affiliation | Grad. of Science and Engineering, Waseda University |
| 3rd Author's Name | Nozomu TOGAWA |
| 3rd Author's Affiliation | Grad. of Science and Engineering, Waseda University |
| 4th Author's Name | Kimiyoshi USAMI |
| 4th Author's Affiliation | Grad. of Science and Engineering, Waseda University:Dept. of Information Science and Engineering, Shibaura Insititute of Technology |
| 5th Author's Name | Masao YANAGISAWA |
| 5th Author's Affiliation | Grad. of Science and Engineering, Waseda University |
| Date | 2014-11-26 |
| Paper # | VLD2014-79,DC2014-33 |
| Volume (vol) | vol.114 |
| Number (no) | 329 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |