Presentation 2014-11-26
An FPGA Implementation of Real-Time Traffic-Sign Detection for Driver Assistance System
Masaharu YAMAMOTO, Anh-Tuan HOANG, Tetsushi KOIDE,
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Abstract(in English) In this paper, we propose a hardware-oriented speed traffic-sign recognition algorithm and its FPGA architecture in which real-time processing is possible for Advanced Driving Assistant System (ADAS). The proposed algorithm performs the sign detection using binary images, which are converted from a grayscale input images. The proposed method enables real-time speed sign recognition for FPGA implementation by using run lengths of pixel within a candidate region and black and white pixel-histograms in the region which are easily calculated by simple arithmetic and logical operations. From the experimental results, the proposed method achieves the recognition accuracy up to more than a 99 % in daytimes and up to a 94.2 % at nights including rainy night situations.
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Keyword(in English) Advanced Driver Assistance System (ADAS) / Real-Time Processing / Traffic-Sign Recognition / Number Recognition / FPGA Implementation
Paper # VLD2014-76,DC2014-30
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Committee DC
Conference Date 2014/11/19(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An FPGA Implementation of Real-Time Traffic-Sign Detection for Driver Assistance System
Sub Title (in English)
Keyword(1) Advanced Driver Assistance System (ADAS)
Keyword(2) Real-Time Processing
Keyword(3) Traffic-Sign Recognition
Keyword(4) Number Recognition
Keyword(5) FPGA Implementation
1st Author's Name Masaharu YAMAMOTO
1st Author's Affiliation Graduate School of Advanced Sciences of Matter, Hiroshima University()
2nd Author's Name Anh-Tuan HOANG
2nd Author's Affiliation Research Institute for Nanodevice and Bio Systems (RNBS), Hiroshima University
3rd Author's Name Tetsushi KOIDE
3rd Author's Affiliation Graduate School of Advanced Sciences of Matter, Hiroshima University:Research Institute for Nanodevice and Bio Systems (RNBS), Hiroshima University
Date 2014-11-26
Paper # VLD2014-76,DC2014-30
Volume (vol) vol.114
Number (no) 329
Page pp.pp.-
#Pages 6
Date of Issue