Presentation 2014-11-26
Data Dependent Optimization using Suspicious Timing Error Prediction for Reconfigurable Approximation Circuits
Kazushi KAWAMURA, Shinya ABE, Youhua SHI, Masao YANAGISAWA, Nozomu TOGAWA,
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Abstract(in English) The propagation delay along each path inside an LSI widely varies depending on input data, and this property can be exploited to design high-performance approximation circuit with a negligible error rate. In this paper, we propose a novel approximation circuit design algorithm, which identifies paths to be optimized based on input data and reconfigures these paths. Our algorithm first identifies the optimized paths by incorporating timing error prediction circuits into a target circuit and running them in practice. These paths are then dynamically reconfigured within an accuracy constraint with the objective of maximizing its performance. Experimental results targeting a set of basic adders show that our algorithm can achieve performance increase by up to 18.5% within acceptable error of 2.1% compared with conventional design techniques.
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Keyword(in English) approximation circuit design / input data dependent / timing error prediction / reconfigurable device
Paper # VLD2014-80,DC2014-34
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Committee VLD
Conference Date 2014/11/19(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Data Dependent Optimization using Suspicious Timing Error Prediction for Reconfigurable Approximation Circuits
Sub Title (in English)
Keyword(1) approximation circuit design
Keyword(2) input data dependent
Keyword(3) timing error prediction
Keyword(4) reconfigurable device
1st Author's Name Kazushi KAWAMURA
1st Author's Affiliation Dept. of Computer Science and Engineering, Waseda University()
2nd Author's Name Shinya ABE
2nd Author's Affiliation Dept. of Computer Science and Engineering, Waseda University
3rd Author's Name Youhua SHI
3rd Author's Affiliation Waseda Institute for Advanced Study, Waseda University
4th Author's Name Masao YANAGISAWA
4th Author's Affiliation Dept. of Electronic and Photonic Systems, Waseda University
5th Author's Name Nozomu TOGAWA
5th Author's Affiliation Dept. of Computer Science and Engineering, Waseda University
Date 2014-11-26
Paper # VLD2014-80,DC2014-34
Volume (vol) vol.114
Number (no) 328
Page pp.pp.-
#Pages 6
Date of Issue