Presentation 2014-09-19
Formal Verification System of Multi-clock Synchronous Circuits on Multimodal Logic
Shunji NISHIMURA, Motoki AMAGASAKI, Toshinori SUEYOSHI,
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Abstract(in English) Regardless of wide using of a formal verification methods, almost all of the methods limited to single-clock synchrounous circiut. We propose a formal verification system of multi-clock synchronous circuit. The verification system is based on multimodal logic. The system is dedactive and its dedaction system is sound. The soundness will be proven by a behavioral equivalence of a multi-clock synchronous circuit and a kind of state machine. While, we show a verification example of a clock switching circuit on the system.
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Keyword(in English) multi-clock / formal method / formal verification / verification method / modal logic
Paper # RECONF2014-33
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Committee RECONF
Conference Date 2014/9/11(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Formal Verification System of Multi-clock Synchronous Circuits on Multimodal Logic
Sub Title (in English)
Keyword(1) multi-clock
Keyword(2) formal method
Keyword(3) formal verification
Keyword(4) verification method
Keyword(5) modal logic
1st Author's Name Shunji NISHIMURA
1st Author's Affiliation Graduate School of Science and Technology, Kumamoto University()
2nd Author's Name Motoki AMAGASAKI
2nd Author's Affiliation Graduate School of Science and Technology, Kumamoto University
3rd Author's Name Toshinori SUEYOSHI
3rd Author's Affiliation Graduate School of Science and Technology, Kumamoto University
Date 2014-09-19
Paper # RECONF2014-33
Volume (vol) vol.114
Number (no) 223
Page pp.pp.-
#Pages 6
Date of Issue