| Presentation | 2014-09-19 Building a Mixed Software Hardware Pipeline on a CPU-FPGA platform Takaaki MIYAJIMA, David THOMAS, Hideharu AMANO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This new toolchain for accelerating application on CPU-FPGA platforms, called Courier-FPGA, extracts runtime information from a running target binary, and re-constructs the function call graph including input-output data. Then, it synthesizes hardware modules on the FPGA and makes software functions on CPU by using Pipeline Generator. The Pipeline Generator also builds a pipeline control program by using Intel Threading Building Block (Intel TBB) to run both hardware modules and software functions in parallel. Finally, Courier-F-PGA's Function Off-loader dynamically replaces and off-loads the original functions in the binary by using the built pipeline. Courier-FPGA performs the off-loading without user intervention, source code tweaks or re-compilations of the binary. In our case study, Courier-FPGA was used to accelerate a corner detection application binary on the Zynq platform. A series of functions were off-loaded, and speed up approx 15 times was achieved by using the built pipeline. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CPU-FPGA platform / Pipelining / Design Methodology |
| Paper # | RECONF2014-27 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2014/9/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Building a Mixed Software Hardware Pipeline on a CPU-FPGA platform |
| Sub Title (in English) | |
| Keyword(1) | CPU-FPGA platform |
| Keyword(2) | Pipelining |
| Keyword(3) | Design Methodology |
| 1st Author's Name | Takaaki MIYAJIMA |
| 1st Author's Affiliation | Faculty of Science and Technology, Keio University() |
| 2nd Author's Name | David THOMAS |
| 2nd Author's Affiliation | Department of Electrical and Electronic Engineering, Imperial Collegem London |
| 3rd Author's Name | Hideharu AMANO |
| 3rd Author's Affiliation | Faculty of Science and Technology, Keio University |
| Date | 2014-09-19 |
| Paper # | RECONF2014-27 |
| Volume (vol) | vol.114 |
| Number (no) | 223 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |