| Presentation | 2014-09-18 Challenge for Ultrafast 10K-Node NoC emulation on FPGA CHU Thiem VAN, Shimpei SATO, Kenji KISE, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | With thousands of cores in the near future NoC architectures, the simulation time is a serious problem that makes architectural design explorations and performance evaluations become infeasible in many cases. This paper proposes an FPGA-based NoC emulator which can achieve an ultra fast simulation speed without compromising the simulation accuracy. Our NoC emulator is the first FPGA-based one which is able to accurately emulate 10K-Node scale NoCs. Instead of directly implementing NoC designs on an FPGA, we emulate the behavior of the entire network using a small number of physical nodes. Moreover, we propose a method to implement the infinite source queues which are required to store injection packets until they can be accepted by the network. We show that an implementation of our NoC emulator on a Virtex 7 FPGA can achieve 438× simulation speedup over a software-based simulator while maintaining the simulation accuracy. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / NoC / Many-core Architecture / Cycle-Accurate Simulation |
| Paper # | RECONF2014-21 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2014/9/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Challenge for Ultrafast 10K-Node NoC emulation on FPGA |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | NoC |
| Keyword(3) | Many-core Architecture |
| Keyword(4) | Cycle-Accurate Simulation |
| 1st Author's Name | CHU Thiem VAN |
| 1st Author's Affiliation | Graduate School of Information Science and Engineering, Tokyo Institute of Technology() |
| 2nd Author's Name | Shimpei SATO |
| 2nd Author's Affiliation | Graduate School of Information Science and Engineering, Tokyo Institute of Technology |
| 3rd Author's Name | Kenji KISE |
| 3rd Author's Affiliation | Graduate School of Information Science and Engineering, Tokyo Institute of Technology |
| Date | 2014-09-18 |
| Paper # | RECONF2014-21 |
| Volume (vol) | vol.114 |
| Number (no) | 223 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |