| Presentation | 2014-08-04 A 32-bit CPU with Zero Standby Power and 1.5-clock Backup/2.5-clock Restore Achieved by Utilizing a 180-nm Crystalline Oxide Semiconductor Transistor Jun KOYAMA, Atsuo ISOBE, Hikaru TAMURA, Kiyoshi KATO, Takuro OHMARU, Wataru UESUGI, Takahiko ISHIZU, Kazuaki OHSHIMA, Yasutaka SUZUKI, Naoaki TSUTSUI, Tomoaki ATSUMI, Yutaka SHIONOIRI, Yukio MAEHASHI, Masahiro FUJITA, Shunpei YAMAZAKI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A flip-flop achieving high-speed backup utilizing a Si transistor and long-term retention with zero standby power by means of a transistor of a crystalline oxide semiconductor, especially a c-axis aligned crystalline In-Ga-Zn oxide semiconductor, featuring extremely low off-state current is proposed. Using the flip-flop, a 32-bit processor has been fabricated with 350-nm Si CMOS/180-nm CAAC oxide semiconductor hybrid technology, and demonstrated data backup and power shutdown in 1.5 clock cycles (100 ns at 15 MHz) at a low power of 1.77 nJ, data recovery in 2.5 clock cycles (167 ns at 15 MHz), and data retention with zero standby power for at least a day. According to simulation results, data backup and power shutdown in 1.5 clock cycles, data recovery in 2.5 clock cycles, and long-term retention can also be achieved with 45-nm Si CMOS/180-nm CAAC oxide semiconductor hybrid technology as in a fabricated test chip. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Crystalline Oxide Semiconductor / CAAC-IGZO / Power gating / Zero standby power / Two-step backup flip-flop |
| Paper # | SDM2014-70,ICD2014-39 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2014/7/28(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 32-bit CPU with Zero Standby Power and 1.5-clock Backup/2.5-clock Restore Achieved by Utilizing a 180-nm Crystalline Oxide Semiconductor Transistor |
| Sub Title (in English) | |
| Keyword(1) | Crystalline Oxide Semiconductor |
| Keyword(2) | CAAC-IGZO |
| Keyword(3) | Power gating |
| Keyword(4) | Zero standby power |
| Keyword(5) | Two-step backup flip-flop |
| 1st Author's Name | Jun KOYAMA |
| 1st Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd.() |
| 2nd Author's Name | Atsuo ISOBE |
| 2nd Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 3rd Author's Name | Hikaru TAMURA |
| 3rd Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 4th Author's Name | Kiyoshi KATO |
| 4th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 5th Author's Name | Takuro OHMARU |
| 5th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 6th Author's Name | Wataru UESUGI |
| 6th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 7th Author's Name | Takahiko ISHIZU |
| 7th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 8th Author's Name | Kazuaki OHSHIMA |
| 8th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 9th Author's Name | Yasutaka SUZUKI |
| 9th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 10th Author's Name | Naoaki TSUTSUI |
| 10th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 11th Author's Name | Tomoaki ATSUMI |
| 11th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 12th Author's Name | Yutaka SHIONOIRI |
| 12th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 13th Author's Name | Yukio MAEHASHI |
| 13th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| 14th Author's Name | Masahiro FUJITA |
| 14th Author's Affiliation | VLSI Design and Education Center(VDEC), The University of Tokyo |
| 15th Author's Name | Shunpei YAMAZAKI |
| 15th Author's Affiliation | Semiconductor Energy Laboratory Co., Ltd. |
| Date | 2014-08-04 |
| Paper # | SDM2014-70,ICD2014-39 |
| Volume (vol) | vol.114 |
| Number (no) | 175 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |