Presentation 2014-08-04
STT-MRAM Development for Embedded Cache Memory
Toshihiro Sugii, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Kouji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsusi Takahashi, Chikakko Yoshida,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) We report the current status of our development of spin-transfer torque magnetic RAMs (STT-MRAMs) and their integration with the back-end-of-line (BEOL) process to replace conventional embedded SRAM cache memories. In order to enhance CPU performance, it is very effective to increase cache memory capacity. If we can reduce the switching current, we can reduce MRAM cell size and increase memory capacity. To reduce the switching current, shrinking MTJ is effective. On the other hand, under the same lithography technology, the smaller the MTJ, the larger the variation in MTJ size. This paper describes the new process for fabricating smaller MTJs for high density RAMs without increasing MTJ size variation.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Spin transfer torque / STT-MRAM / MTJ / Low power / Embedded / BEOL
Paper # SDM2014-68,ICD2014-37
Date of Issue

Conference Information
Committee ICD
Conference Date 2014/7/28(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) STT-MRAM Development for Embedded Cache Memory
Sub Title (in English)
Keyword(1) Spin transfer torque
Keyword(2) STT-MRAM
Keyword(3) MTJ
Keyword(4) Low power
Keyword(5) Embedded
Keyword(6) BEOL
1st Author's Name Toshihiro Sugii
1st Author's Affiliation Low-power Electronics Association & Project(LEAP)()
2nd Author's Name Yoshihisa Iba
2nd Author's Affiliation Low-power Electronics Association & Project(LEAP)
3rd Author's Name Masaki Aoki
3rd Author's Affiliation Low-power Electronics Association & Project(LEAP)
4th Author's Name Hideyuki Noshiro
4th Author's Affiliation Low-power Electronics Association & Project(LEAP)
5th Author's Name Kouji Tsunoda
5th Author's Affiliation Low-power Electronics Association & Project(LEAP)
6th Author's Name Akiyoshi Hatada
6th Author's Affiliation Low-power Electronics Association & Project(LEAP)
7th Author's Name Masaaki Nakabayashi
7th Author's Affiliation Low-power Electronics Association & Project(LEAP)
8th Author's Name Yuuichi Yamazaki
8th Author's Affiliation Low-power Electronics Association & Project(LEAP)
9th Author's Name Atsusi Takahashi
9th Author's Affiliation Low-power Electronics Association & Project(LEAP)
10th Author's Name Chikakko Yoshida
10th Author's Affiliation Low-power Electronics Association & Project(LEAP)
Date 2014-08-04
Paper # SDM2014-68,ICD2014-37
Volume (vol) vol.114
Number (no) 175
Page pp.pp.-
#Pages 4
Date of Issue