| Presentation | 2014-08-04 Testability Improvement for 12.8 GB/s Wide IO DRAM Controller by Small Area Pre-bonding TSV Tests and a 1GHz Sampled Fully Digital Noise Monitor Takao Nomura, Ryo Mori, Koji Takayanagi, Toshihiko Ochiai, Kazuki Fukuoka, Tsuyoshi Kida, Koji Nii, Sadayuki Morita, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We developed a Wide IO DRAM controller chip with Through Silicon Via (TSV) technology. Test circuitry is embedded in the micro-IOs placed between the fine pitch TSVs which can reject TSV connectivity failures prior to stacking process. In order to reduce Vmin degradation induced by 512 DQs simultaneously switching noise, we introduce a package-board impedance optimization method utilizing a full digital noise monitor. We achieved 12.8 GB/s operation, while IO power was reduced by 89% compared to LPDDR3. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | TSV / Wide IO DRAM / pre-bonding test / fully digital noise monitor / simultaneous switching noise / impedance optimization |
| Paper # | SDM2014-65,ICD2014-34 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2014/7/28(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Testability Improvement for 12.8 GB/s Wide IO DRAM Controller by Small Area Pre-bonding TSV Tests and a 1GHz Sampled Fully Digital Noise Monitor |
| Sub Title (in English) | |
| Keyword(1) | TSV |
| Keyword(2) | Wide IO DRAM |
| Keyword(3) | pre-bonding test |
| Keyword(4) | fully digital noise monitor |
| Keyword(5) | simultaneous switching noise |
| Keyword(6) | impedance optimization |
| 1st Author's Name | Takao Nomura |
| 1st Author's Affiliation | Renesas Electronics Corporation() |
| 2nd Author's Name | Ryo Mori |
| 2nd Author's Affiliation | Renesas Electronics Corporation |
| 3rd Author's Name | Koji Takayanagi |
| 3rd Author's Affiliation | Renesas Electronics Corporation |
| 4th Author's Name | Toshihiko Ochiai |
| 4th Author's Affiliation | Renesas Electronics Corporation |
| 5th Author's Name | Kazuki Fukuoka |
| 5th Author's Affiliation | Renesas Electronics Corporation |
| 6th Author's Name | Tsuyoshi Kida |
| 6th Author's Affiliation | Renesas Electronics Corporation |
| 7th Author's Name | Koji Nii |
| 7th Author's Affiliation | Renesas Electronics Corporation |
| 8th Author's Name | Sadayuki Morita |
| 8th Author's Affiliation | Renesas Electronics Corporation |
| Date | 2014-08-04 |
| Paper # | SDM2014-65,ICD2014-34 |
| Volume (vol) | vol.114 |
| Number (no) | 175 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |