Presentation 2014-08-04
Research progress in steep slope devices and technologies to enhance ON current in TFETs
Takahiro MORI, Yukinori MORITA, Shinji MIGITA, Wataru MIZUBAYASHI, Koichi FUKUDA, Noriyuki MIYATA, Tetsuji YASUDA, Meishoku MASAHARA, Hiroyuki OTA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Steep slope devices (SSDs) have attracted because of the increase demand for low-power devices. This paper reviews recent research progress in SSDs. Tunnel field-effect transistor (TFET), which is the front runner in SSDs, has a problem in their ON current. There are two ways to enhance the ON current; one is by enhancing electric-field at the junction, and another is by realizing high tunneling probability.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Steep slope devices / tunnel field-effect transistor / Synthetic electric field / isoelectronic trap
Paper # SDM2014-67,ICD2014-36
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Conference Information
Committee SDM
Conference Date 2014/7/28(1days)
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Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Research progress in steep slope devices and technologies to enhance ON current in TFETs
Sub Title (in English)
Keyword(1) Steep slope devices
Keyword(2) tunnel field-effect transistor
Keyword(3) Synthetic electric field
Keyword(4) isoelectronic trap
1st Author's Name Takahiro MORI
1st Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)()
2nd Author's Name Yukinori MORITA
2nd Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)
3rd Author's Name Shinji MIGITA
3rd Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)
4th Author's Name Wataru MIZUBAYASHI
4th Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)
5th Author's Name Koichi FUKUDA
5th Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)
6th Author's Name Noriyuki MIYATA
6th Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)
7th Author's Name Tetsuji YASUDA
7th Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)
8th Author's Name Meishoku MASAHARA
8th Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)
9th Author's Name Hiroyuki OTA
9th Author's Affiliation Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology(AIST)
Date 2014-08-04
Paper # SDM2014-67,ICD2014-36
Volume (vol) vol.114
Number (no) 174
Page pp.pp.-
#Pages 6
Date of Issue