Presentation | 2014-07-10 Feasibility of Fault-injected Timing Identigication for Actual Cryptographic Devices Using Side-channel Information Ko NAKAMURA, Yu-ichi HAYASHI, Takaaki MIZUKI, Naofumi HOMMA, Takafumi AOKI, Hideaki SONE, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | The intentional electromagnetic interference (IEMI) fault-injection method using continuous sine waves causes random-bytes faults in the cryptographic devices. Therefore, it was difficult to obtain faulty ciphertext available for conventional analysis methods which assumes the specific byte errors in ciphertext. In this paper, in order to identify the number of fault-injected bytes, we describe an identification technique using side-channel information. The feasibility of the proposal method is verified by observation of voltage waveforms between a power line and ground plane of cryptographic module in time domain with time resolution by 1 ns. In our experiment, we employ a real cryptographic device with Advanced Encryption Standard (AES) implemented and a clock glitch generator which can be adjusted by 0.17 ns steps. Through this experiment, we identified that the change of side-channel waveforms correspond to the number of faulty bytes. Moreover, on the basis of this result, we showed that it is possible to extract available faulty ciphertext for the conventional analysis methods. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Side-channel Information / Intentional Electromagnetic Interference / Fault Analysis |
Paper # | EMCJ2014-23 |
Date of Issue |
Conference Information | |
Committee | EMCJ |
---|---|
Conference Date | 2014/7/3(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Electromagnetic Compatibility (EMCJ) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Feasibility of Fault-injected Timing Identigication for Actual Cryptographic Devices Using Side-channel Information |
Sub Title (in English) | |
Keyword(1) | Side-channel Information |
Keyword(2) | Intentional Electromagnetic Interference |
Keyword(3) | Fault Analysis |
1st Author's Name | Ko NAKAMURA |
1st Author's Affiliation | Tohoku University() |
2nd Author's Name | Yu-ichi HAYASHI |
2nd Author's Affiliation | Tohoku University |
3rd Author's Name | Takaaki MIZUKI |
3rd Author's Affiliation | Tohoku University |
4th Author's Name | Naofumi HOMMA |
4th Author's Affiliation | Tohoku University |
5th Author's Name | Takafumi AOKI |
5th Author's Affiliation | Tohoku University |
6th Author's Name | Hideaki SONE |
6th Author's Affiliation | Tohoku University |
Date | 2014-07-10 |
Paper # | EMCJ2014-23 |
Volume (vol) | vol.114 |
Number (no) | 129 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |