| Presentation | 2014-09-05 Optimum Design Method for Optical Switches Employing Cyclic Arrayed Waveguide Gratings Koh UEDA, Yojiro MORI, Hiroshi HASEGAWA, Ken-ichi SATO, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | With the rise of novel services such as cloud computing and parallel computing, intra-datacenter traffic is growing rapidly and as a result optical switches that can process such large traffic volume with low latency and low power consumption will play a key role. For optical switches used in datacenter, high-speed switching and port-count scalability are required. Among various optical-switch configurations, a combination of delivery-and-coupling switches and wavelength-routing switches that utilize cyclic arrayed waveguide gratings was proposed. However, the maximum port count of the switch has not yet been discussed quantitatively. In this paper, we clarify the power budgets necessary for two sub-switch parts through numerical evaluations. Based on the simulation results, we optimally allocate the power budget to the two sub-switches and maximize the total switch scale under the practical condition. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Photonic network / Wavelength-routing switch / Datacenter / Arrayed waveguide gratings |
| Paper # | PN2014-19 |
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| Conference Information | |
| Committee | PN |
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| Conference Date | 2014/8/28(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Photonic Network (PN) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Optimum Design Method for Optical Switches Employing Cyclic Arrayed Waveguide Gratings |
| Sub Title (in English) | |
| Keyword(1) | Photonic network |
| Keyword(2) | Wavelength-routing switch |
| Keyword(3) | Datacenter |
| Keyword(4) | Arrayed waveguide gratings |
| 1st Author's Name | Koh UEDA |
| 1st Author's Affiliation | Department of Electrical Engineering and Computer Science, Nagoya University() |
| 2nd Author's Name | Yojiro MORI |
| 2nd Author's Affiliation | Department of Electrical Engineering and Computer Science, Nagoya University |
| 3rd Author's Name | Hiroshi HASEGAWA |
| 3rd Author's Affiliation | Department of Electrical Engineering and Computer Science, Nagoya University |
| 4th Author's Name | Ken-ichi SATO |
| 4th Author's Affiliation | Department of Electrical Engineering and Computer Science, Nagoya University |
| Date | 2014-09-05 |
| Paper # | PN2014-19 |
| Volume (vol) | vol.114 |
| Number (no) | 201 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |