Presentation 2014-06-12
Improvement of Implementability by Exploring Routing Architecture in Flex Power FPGA
Masakazu HIOKI, Toshihiro SEKIGAWA, Tadashi NAKAGAWA, Yasuhiro OGASAHARA, Toshiyuki TSUTSUMI, Hanpei KOIKE,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In order to design Flex Power FPGA chip, placement and routing are carried out by using many kinds of benchmark circuits. However, routing phase wasn't successful in some benchmark circuits even though the number of LUT is enough. Then, FPGA architecture is explored by changing the design parameters such as the wire segment length and the number of mux inputs. As a result, explored architecture successes placement and routing of relatively large benchmark circuits.
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Keyword(in English) Flex Power FPGA / Architecture exploring / benchmark circuits
Paper # RECONF2014-5
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Conference Information
Committee RECONF
Conference Date 2014/6/4(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Improvement of Implementability by Exploring Routing Architecture in Flex Power FPGA
Sub Title (in English)
Keyword(1) Flex Power FPGA
Keyword(2) Architecture exploring
Keyword(3) benchmark circuits
1st Author's Name Masakazu HIOKI
1st Author's Affiliation National Institute of AIST()
2nd Author's Name Toshihiro SEKIGAWA
2nd Author's Affiliation National Institute of AIST
3rd Author's Name Tadashi NAKAGAWA
3rd Author's Affiliation National Institute of AIST
4th Author's Name Yasuhiro OGASAHARA
4th Author's Affiliation National Institute of AIST
5th Author's Name Toshiyuki TSUTSUMI
5th Author's Affiliation Meiji University
6th Author's Name Hanpei KOIKE
6th Author's Affiliation National Institute of AIST
Date 2014-06-12
Paper # RECONF2014-5
Volume (vol) vol.114
Number (no) 75
Page pp.pp.-
#Pages 5
Date of Issue