Presentation | 2013-12-13 Power Consumption Analysis of Semiconductor Membrane Lasers for On-chip Optical Interconnection Takuo HIRATANI, Kyohei DOI, Yuki ATSUJI, Tomohiro AMEMIYA, Nobuhiko NISHIYAMA, Shigehisa ARAI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Recently, resistor-capacitor (RC) delay and heating in electrical wiring caused by miniaturization of elements in large scale integrated (LSI) circuits have become non-negligible, optical interconnection is expected as one of candidates to solve these problems. We have proposed a semiconductor membrane laser as a light source for on-chip optical interconnection. Since the semiconductor membrane laser consists of thin semiconductor core layer sandwiched between very low refractive-index cladding layers, an extremely low threshold current operation by strong optical confinement is expected. In this paper, we analyzed power consumption of semiconductor membrane distributed-reflector (DR) laser which can realize high efficiency and low power consumption operation. As a result, it was found that power consumption by Joule heating becomes dominant due to high device resistance when the cavity length becomes shorter, and the optimal cavity length which gives the minimum power consumption exists if we assume required conditions (i.e. output power and direct modulation speed) for a light source. In the case of adopting low resistivity of 0.035Ωcm (N_A=4×10^<18>cm^<-3>), the minimum energy cost was estimated to be 37 fJ/bit at the cavity length of 17μm. Toward further reduction of the energy cost, reductions of waveguide loss and coupling loss between each device will be effective. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Semiconductor membrane laser / Distributed-reflector laser / Surface grating / Strong optical confinement |
Paper # | LQE2013-128 |
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Committee | LQE |
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Conference Date | 2013/12/6(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Lasers and Quantum Electronics (LQE) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Power Consumption Analysis of Semiconductor Membrane Lasers for On-chip Optical Interconnection |
Sub Title (in English) | |
Keyword(1) | Semiconductor membrane laser |
Keyword(2) | Distributed-reflector laser |
Keyword(3) | Surface grating |
Keyword(4) | Strong optical confinement |
1st Author's Name | Takuo HIRATANI |
1st Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology() |
2nd Author's Name | Kyohei DOI |
2nd Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology |
3rd Author's Name | Yuki ATSUJI |
3rd Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology |
4th Author's Name | Tomohiro AMEMIYA |
4th Author's Affiliation | Quantum Nanoelectronics Research Center, Tokyo Institute of Technology |
5th Author's Name | Nobuhiko NISHIYAMA |
5th Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology |
6th Author's Name | Shigehisa ARAI |
6th Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology:Quantum Nanoelectronics Research Center, Tokyo Institute of Technology |
Date | 2013-12-13 |
Paper # | LQE2013-128 |
Volume (vol) | vol.113 |
Number (no) | 352 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |