Presentation 2013-12-13
MU-MIMO System-on-Chip Evaluation Platform with 5GHz RF-Module for Next Generation IEEE 802.11 Wireless LAN
Leonardo JR LANANTE, Yuhei NAGAO, Tatsumi UWAI, Nico SURANTHA, Baiko SAI, Hiroshi OCHI,
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Abstract(in English) In this report, we present our system-on-chip (SOC) platform for next generation Wireless LAN applications. The platform consists of a motherboard containing a sizable Stratix IV FPGA, a 2.4GHz/5GHz RF daughterboard, and a highly flexible MPU daughterboard. For the MAC layer which is implemented as a software/hardware co-design, the software part is implemented in the MPU daughterboard while hardware part is implemented in the motherboard FPGA. For the PHY layer which consists of a digital baseband part and analog RF part, the digital part is implemented also in the motherboard FPGA while the analog part is implemented in the RF daughterboard. We show partial implementation results of our platform running a IEEE802.11 based wireless LAN SoC design.
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Keyword(in English) MU-MIMO / IEEE 802.11ac / SOC design
Paper # SIS2013-44
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Committee SIS
Conference Date 2013/12/5(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) MU-MIMO System-on-Chip Evaluation Platform with 5GHz RF-Module for Next Generation IEEE 802.11 Wireless LAN
Sub Title (in English)
Keyword(1) MU-MIMO
Keyword(2) IEEE 802.11ac
Keyword(3) SOC design
1st Author's Name Leonardo JR LANANTE
1st Author's Affiliation Kyushu Institute of Technology()
2nd Author's Name Yuhei NAGAO
2nd Author's Affiliation Radrix Co., Ltd.
3rd Author's Name Tatsumi UWAI
3rd Author's Affiliation Radrix Co., Ltd.
4th Author's Name Nico SURANTHA
4th Author's Affiliation Radrix Co., Ltd.
5th Author's Name Baiko SAI
5th Author's Affiliation Kyushu Institute of Technology
6th Author's Name Hiroshi OCHI
6th Author's Affiliation Kyushu Institute of Technology
Date 2013-12-13
Paper # SIS2013-44
Volume (vol) vol.113
Number (no) 343
Page pp.pp.-
#Pages 6
Date of Issue