Presentation 2013-12-12
Design of Highly Accurate 8×8 MIMO-OFDM System Using ASIP
Hiroki IWAIZUMI, Masahiro SUGITANI, Baiko SAI, Hiroshi TSUTSUI, Yoshikazu MIYANAGA,
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Abstract(in English) In this paper, we propose a hardware design of highly accurate 8×8 multiple-input multiple-output - or -thogonal frequency division multiplexing (MIMO-OFDM) system which has floating-point processors in its receiver. For hardware design of MIMO-OFDM systems, it is efficient to use fixed-point processing in terms of processing speed and power consumption. However, in poor environments, floating-point processing is necessary since highly accurate processing is required for MIMO decoding. In this research, we have realized high accuracy and realtime processing of MIMO decoding by employing application specific instruction-set processor (ASIP) and making algorithm more efficient.
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Keyword(in English) MIMO-OFDM System / MMSE / ASIP / FPU
Paper # SIS2013-33
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Committee SIS
Conference Date 2013/12/5(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of Highly Accurate 8×8 MIMO-OFDM System Using ASIP
Sub Title (in English)
Keyword(1) MIMO-OFDM System
Keyword(2) MMSE
Keyword(3) ASIP
Keyword(4) FPU
1st Author's Name Hiroki IWAIZUMI
1st Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University()
2nd Author's Name Masahiro SUGITANI
2nd Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University
3rd Author's Name Baiko SAI
3rd Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University
4th Author's Name Hiroshi TSUTSUI
4th Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University
5th Author's Name Yoshikazu MIYANAGA
5th Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University
Date 2013-12-12
Paper # SIS2013-33
Volume (vol) vol.113
Number (no) 343
Page pp.pp.-
#Pages 6
Date of Issue