| Presentation | 2013-11-28 TinyCSE : Tiny Computer System for Education Ryosuke NAKAMURA, Koji NAKANO, Yasuaki ITO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | TinyCPU is a small processor that can be implemented in various FPGAs that can be used for education and development of small embedded system. TinyCPU is so small that it is designed using Verilog HDL and the size of source code is only 427 lines. However, it does not support interrupts and peripheral controllers. The main contribution of this paper is to present TinyCSE (Tiny Computer System for Education), an extension of TinyCPU supporting interrupts and peripheral controllers. TinyCSE has controllers for external devices including keyboard, mouse, serial communication, switch, and timer. It also supports hardware interrupts from these external devices. Quite surprisingly, the code sizes of the CPU with interrupt controller and the device controllers are 515 lines and is 1349 lines in Verilog HDL, respectively. Our processor is portable and easy to understand and the function expansion is not difficult. As real-life applications, we have developed a stop watch. This applications runs in 66MHz on the Xilinx Spartan-3AN family FPGA XC3S700AN using 850 out of 5888 slices (14%). Therefore, our tiny processing system benefits computer system education and small embedded system development. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Computer system / CPU / Verilog HDL / Education / Embedded system / Interrupt processing |
| Paper # | CPSY2013-66 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2013/11/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Computer Systems (CPSY) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | TinyCSE : Tiny Computer System for Education |
| Sub Title (in English) | |
| Keyword(1) | Computer system |
| Keyword(2) | CPU |
| Keyword(3) | Verilog HDL |
| Keyword(4) | Education |
| Keyword(5) | Embedded system |
| Keyword(6) | Interrupt processing |
| 1st Author's Name | Ryosuke NAKAMURA |
| 1st Author's Affiliation | Department of Information Engineering Hiroshima University() |
| 2nd Author's Name | Koji NAKANO |
| 2nd Author's Affiliation | Department of Information Engineering Hiroshima University |
| 3rd Author's Name | Yasuaki ITO |
| 3rd Author's Affiliation | Department of Information Engineering Hiroshima University |
| Date | 2013-11-28 |
| Paper # | CPSY2013-66 |
| Volume (vol) | vol.113 |
| Number (no) | 324 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |