Presentation | 2013-11-28 ILP-Based Placement and Routing Method for PLDs for Minimizing Critical Path Length Hiroki NISHIYAMA, Masato INAGI, Shinobu NAGAYAMA, Shin'ichi WAKABAYASHI, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In this paper, we propose an ILP-based method for simultaneous optimal technology mapping, placement and routing for programmable logic devices, such as FPGAs. In general, for each of technology mapping, placement and routing, heuristic methods are used to obtain high quality solutions within a practical time. However, solution quality is not guaranteed, and the separated design processes (i.e., technology mapping, placement and routing) probably make the final solutions not optimal. Thus, simultaneous and optimal methods are useful to evaluate and develop heuristic methods even if they take a long time. In experiments, we confirmed that the optimal total wire length and critical path length of small circuits were obtained by our method. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | PLD / FPGA / technology mapping / placement and routing / exact optimal solution / ILP |
Paper # | RECONF2013-49 |
Date of Issue |
Conference Information | |
Committee | RECONF |
---|---|
Conference Date | 2013/11/20(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Reconfigurable Systems (RECONF) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | ILP-Based Placement and Routing Method for PLDs for Minimizing Critical Path Length |
Sub Title (in English) | |
Keyword(1) | PLD |
Keyword(2) | FPGA |
Keyword(3) | technology mapping |
Keyword(4) | placement and routing |
Keyword(5) | exact optimal solution |
Keyword(6) | ILP |
1st Author's Name | Hiroki NISHIYAMA |
1st Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University() |
2nd Author's Name | Masato INAGI |
2nd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
3rd Author's Name | Shinobu NAGAYAMA |
3rd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
4th Author's Name | Shin'ichi WAKABAYASHI |
4th Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
Date | 2013-11-28 |
Paper # | RECONF2013-49 |
Volume (vol) | vol.113 |
Number (no) | 325 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |