Presentation 2013/11/20
FPGAを対象とした束データ方式による非同期式回路の設計支援ツールセット(設計支援,デザインガイア2013-VLSI設計の新しい大地-)
KEITARO TAKIZAWA, HIROSHI SAITO,
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Abstract(in English) This paper proposes a design support tool set for asynchronous circuits with bundled-data implementation which are implemented on a field programmable gate array (FPGA). First, the control module which is composed of primitives is proposed considering area and ease of static timing analysis. The control circuit is composed of control modules. Next, the tool set which automates generation of delay elements and design constraints, timing verification, and delay adjustment is proposed. By using the proposed tool set with a commercial FPGA design tool, the design of a bundled-data implementation with a latency constraint on an FPGA becomes easy, In the experients, this paper evaluates the synthesized circuits in terms of area, latency, power consumption, and energy consumption for some benchmarks comparing with the synchronous counterparts. / This paper proposes a design support tool set for asynchronous circuits with bundled-data implementation which are implemented on a field programmable gate array (FPGA). First, the control module which is composed of primitives is proposed considering area and ease of static timing analysis. The control circuit is composed of control modules. Next, the tool set which automates generation of delay elements and design constraints, timing verification, and delay adjustment is proposed. By using the proposed tool set with a commercial FPGA design tool, the design of a bundled-data implementation with a latency constraint on an FPGA becomes easy, In the experients, this paper evaluates the synthesized circuits in terms of area, latency, power consumption, and energy consumption for some benchmarks comparing with the synchronous counterparts.
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Paper # Vol.2013-SLDM-163 No.13
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Committee DC
Conference Date 2013/11/20(1days)
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Registration To Dependable Computing (DC)
Language JPN
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Title (in English)
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1st Author's Name KEITARO TAKIZAWA
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2nd Author's Name HIROSHI SAITO
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Date 2013/11/20
Paper # Vol.2013-SLDM-163 No.13
Volume (vol) vol.113
Number (no) 321
Page pp.pp.-
#Pages 6
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