| Presentation | 2013-11-27 Fault-Tolerant Design with Less Overhead than DMR Atsushi MATSUO, Shigeru YAMASHITA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper proposes two methods to increase yeild by using Partially-Programmable Circuits (PPCs) that are proposed to increase yeild recently. In our proposed methods, we add MUXs, LUTs and multipule redundant connections into a PPC to bypass a fault. To realize our proposed methods, we develop a new concept called Remaining SPFD. Remaining SPFD can be considered as an extension of SPFDs whhich are used to represent functional flexibilities for LUT networks. Compared to Dual Module Redundancy (DMR), our proposed methods do not duplicate an entire circuit. Therefore our proposed methods can realize fault-tolerant circuits with less overhead than DMR. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | PPC / Fault Tolerance / DMR |
| Paper # | VLD2013-66,DC2013-32 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2013/11/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Fault-Tolerant Design with Less Overhead than DMR |
| Sub Title (in English) | |
| Keyword(1) | PPC |
| Keyword(2) | Fault Tolerance |
| Keyword(3) | DMR |
| 1st Author's Name | Atsushi MATSUO |
| 1st Author's Affiliation | Graduate School of Science and Engineering Ritsumeikan University() |
| 2nd Author's Name | Shigeru YAMASHITA |
| 2nd Author's Affiliation | Graduate School of Science and Engineering Ritsumeikan University |
| Date | 2013-11-27 |
| Paper # | VLD2013-66,DC2013-32 |
| Volume (vol) | vol.113 |
| Number (no) | 321 |
| Page | pp.pp.- |
| #Pages | 5 |
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