Presentation | 2014-04-25 A Hardware Cache Mechanism for Column-Oriented Databases Akihiko HAMADA, Hiroki MATSUTANI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A column-oriented store is one of structured storages (NOSQLs), in which a variable number of columns are stored for each row. As rows in a column-oriented store are sorted, a scan operation between given start and stop rows is possible. In this paper, we discuss ways to accelerate a column-oriented store using an FPGA (Field-Programmable Gate Array). More specifically, we focus on a hardware-based cache mechanism of a column-oriented store (HBase Cache, HBC) implemented on an FPGA platform that equips lOGbE network interfaces. The FPGA board is mounted on a host computer via PCI Express. HBC caches a certain number of latest successive rows in a main memory of the host computer. When HBC hits, cached data retrieved from the host memory are available without software-based database processing; thus the column-oriented store can be accelerated. We develop a simple performance model of HBC that takes into account the cache hit and miss ratios of database scan requests, and then we show that a significant performance improvement can be achieved by the proposed HBC. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | FPGAs / Accelerator design / Cache / Databases / Structured storages |
Paper # | CPSY2014-5,DC2014-5 |
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Committee | DC |
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Conference Date | 2014/4/18(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Dependable Computing (DC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Hardware Cache Mechanism for Column-Oriented Databases |
Sub Title (in English) | |
Keyword(1) | FPGAs |
Keyword(2) | Accelerator design |
Keyword(3) | Cache |
Keyword(4) | Databases |
Keyword(5) | Structured storages |
1st Author's Name | Akihiko HAMADA |
1st Author's Affiliation | Graduate School of Science and Technology, Keio University() |
2nd Author's Name | Hiroki MATSUTANI |
2nd Author's Affiliation | Graduate School of Science and Technology, Keio University:PRESTO, Japan Science and Technology Agency:National Institute of Informatics |
Date | 2014-04-25 |
Paper # | CPSY2014-5,DC2014-5 |
Volume (vol) | vol.114 |
Number (no) | 22 |
Page | pp.pp.- |
#Pages | 6 |
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