Presentation | 2014-02-10 A reduction method of shift data volume on BAST Marika TANAKA, Hiroshi YAMAZAKI, Toshinori HOSOKAWA, Masayoshi YOSHIMURA, Masayuki ARAI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | BAST is one of techniques to reduce the amount of test data while maintaining the high test quality using built-in self test and deterministic test generation. On BAST architecture, a bit-flipping technique is used to convert pseudo-random patterns to deterministic patterns. BAST codes, which are test data on BAST, are composed of shift instructions and bit-flipping instructions. The number of shift instructions depends on the number of deterministic patterns and the scan chain length, and the number of bit-flipping instructions depends on the number of conflicts between deterministic patterns and pseudo random patterns. In this paper, we propose a new shift instruction which successively conducts shift operations for specified cycles to reduce the number of shift instructions. Experimental results show that the proposed method was effective to reduce the number of shift instructions for ISCAS'89 and ITC'99 benchmark circuits. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | BAST architecture / shift instructions / BAST code / bit-flipping instructions |
Paper # | DC2013-87 |
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Conference Information | |
Committee | DC |
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Conference Date | 2014/2/3(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Dependable Computing (DC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A reduction method of shift data volume on BAST |
Sub Title (in English) | |
Keyword(1) | BAST architecture |
Keyword(2) | shift instructions |
Keyword(3) | BAST code |
Keyword(4) | bit-flipping instructions |
1st Author's Name | Marika TANAKA |
1st Author's Affiliation | Graduate School of Industrial Technology, Nihon University() |
2nd Author's Name | Hiroshi YAMAZAKI |
2nd Author's Affiliation | Graduate School of Industrial Technology, Nihon University |
3rd Author's Name | Toshinori HOSOKAWA |
3rd Author's Affiliation | College of Industrial Technology, Nihon University |
4th Author's Name | Masayoshi YOSHIMURA |
4th Author's Affiliation | Faculty of Information Science and Electrical Engineering, Kyushu University |
5th Author's Name | Masayuki ARAI |
5th Author's Affiliation | College of Industrial Technology, Nihon University |
Date | 2014-02-10 |
Paper # | DC2013-87 |
Volume (vol) | vol.113 |
Number (no) | 430 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |