| Presentation | 2014-01-28 A FPGA/GPU cooperation in nodes communication using PEACH2 Takuya KUHARA, Takaaki MIYAJIMA, Toshihiro HANAWA, Hideharu AMANO, Taisuke BOKU, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | PEACH2 (PCI-Express Adaptive Communication Hub 2) is a inter/intra node communication enhancement system for HA-PACS, which is developed by Tsukuba Univ. It enables ultra low latency direct communication among over multiple nodes. Although PEACH2 can reduce data transfer time between GPUs, there are some applications that PEACH2 cannot deal with a situation. For example, CPU processing exists among GPU communication. Current PEACH2 just works as communication hub, and not processing unit. In this paper, we introduces simple processing module on PEACH2 in order to concurrent execution of communication and processing. Additionally, we consider an application acceleration using this module. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / GPU / HA-PACS / PEACH2 |
| Paper # | VLD2013-108,CPSY2013-79,RECONF2013-62 |
| Date of Issue |
| Conference Information | |
| Committee | CPSY |
|---|---|
| Conference Date | 2014/1/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Computer Systems (CPSY) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A FPGA/GPU cooperation in nodes communication using PEACH2 |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | GPU |
| Keyword(3) | HA-PACS |
| Keyword(4) | PEACH2 |
| 1st Author's Name | Takuya KUHARA |
| 1st Author's Affiliation | Graduate School of Science and Technology, Keio University() |
| 2nd Author's Name | Takaaki MIYAJIMA |
| 2nd Author's Affiliation | Graduate School of Science and Technology, Keio University |
| 3rd Author's Name | Toshihiro HANAWA |
| 3rd Author's Affiliation | Supercomputing Division, Information Technology Center, The University of Tokyo |
| 4th Author's Name | Hideharu AMANO |
| 4th Author's Affiliation | Graduate School of Science and Technology, Keio University |
| 5th Author's Name | Taisuke BOKU |
| 5th Author's Affiliation | Division of Information Engineering, Faculty of Engineering, Information and Systems, Univ. of Tsukuba |
| Date | 2014-01-28 |
| Paper # | VLD2013-108,CPSY2013-79,RECONF2013-62 |
| Volume (vol) | vol.113 |
| Number (no) | 417 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |