| Presentation | 2013-09-13 Evaluation for cryptographic side channel leak using FDTD simulation Toshiya ASAI, Masaya YOSHIKAWA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The side-channel attacks against cryptographic hardware, is studied in recent years, and various countermeasures have been proposed. In design of cryptographic hardware, it should be evaluated at design time whether if an attack resistance of power and electromagnetic analysis attack meets product specifications. But, generally it is not an easy task to acquire a large amount of waveforms enough for attack simulation. In this study, we propose a design time evaluation method of electromagnetic analysis attack simulation, which is more complicated than the power analysis attack simulation. The proposed method enables an evaluation of resistance against the electromagnetic analysis attack in the LSI and PCB design time. Specifically, it is evaluated by predicting the electromagnetic waveform from the response waveforms by a circuit simulation and a FDTD EM simulation that include LSI net list and a simplified PCB model. Experiments using prototype LSI verified the validity of the proposed method. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Side channel attack / Electromagnetic Analysis Attack / FDTD simulation |
| Paper # | ISEC2013-51 |
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| Conference Information | |
| Committee | ISEC |
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| Conference Date | 2013/9/6(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Information Security (ISEC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Evaluation for cryptographic side channel leak using FDTD simulation |
| Sub Title (in English) | |
| Keyword(1) | Side channel attack |
| Keyword(2) | Electromagnetic Analysis Attack |
| Keyword(3) | FDTD simulation |
| 1st Author's Name | Toshiya ASAI |
| 1st Author's Affiliation | Dept. of Information Engineering, Meijo University() |
| 2nd Author's Name | Masaya YOSHIKAWA |
| 2nd Author's Affiliation | Dept. of Information Engineering, Meijo University |
| Date | 2013-09-13 |
| Paper # | ISEC2013-51 |
| Volume (vol) | vol.113 |
| Number (no) | 217 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |