| Presentation | 2014-01-24 Comparison of the final addition circuit in SFQ parallel multiplier with a tree structure partial product adder circuit Akifumi Yamada, Takeshi Onomi, Koji Nakajima, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A single flux quantum (SFQ) circuit is capable of high-speed operation in a few 10 GHz, and it has a big advantage compared to the semiconductor circuit about calorific power. We have the goal of creating a high-speed multiplier significantly related to its performance in a fast Fourier transform circuit. Those of bit-serial type have been already developed, we are challenging the development of bit parallel type to take advantage of the high speed of the SFQ circuit. To speed up the parallel multiplier, the partial product generation, the partial product summation, and the configuration of the final-stage adder circuit should be studied. We investigate the final-stage adder circuit to achieve a faster and low power multiplier. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Single Flux Quantum / Parallel multiplier / DaddaTree |
| Paper # | SCE2013-52 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2014/1/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Comparison of the final addition circuit in SFQ parallel multiplier with a tree structure partial product adder circuit |
| Sub Title (in English) | |
| Keyword(1) | Single Flux Quantum |
| Keyword(2) | Parallel multiplier |
| Keyword(3) | DaddaTree |
| 1st Author's Name | Akifumi Yamada |
| 1st Author's Affiliation | Laboratory for Brainware/Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University() |
| 2nd Author's Name | Takeshi Onomi |
| 2nd Author's Affiliation | Laboratory for Brainware/Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University |
| 3rd Author's Name | Koji Nakajima |
| 3rd Author's Affiliation | Laboratory for Brainware/Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University |
| Date | 2014-01-24 |
| Paper # | SCE2013-52 |
| Volume (vol) | vol.113 |
| Number (no) | 401 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |