Presentation 2013-10-07
A Memory Based Filed Programmable Device for Energy saving MCUs
Tetsuya Matsumura, Yoshifumi KAWAMURA, Naoya OKADA, Kazutami ARIMOTO, Makino HIROSHI, Yoshio MATSUDA,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) A Field Programmable Sequencer and memory (FPSM), which is an embedded memory based programmable peripherals for Micro Controller Units, was proposed in architecture level. The FPSM functions as not only memories but also as finite autonomous state transition controls without CPU. In this paper, concept and architecture of FPSM, and an implementation on an FPGA is described. The FPGA operates at the maximum frequency of 50 MHz. Correct operations of fundamental peripherals such as timers, shifters, serial receivers/transmitters, FIFOs and Pulse Width Modulations (PWM) are verified.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / MCU / Memory / Peripheral functions / Programmable devices / Sequencer
Paper # VLD2013-46,ICD2013-70,IE2013-46
Date of Issue

Conference Information
Committee ICD
Conference Date 2013/9/30(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Memory Based Filed Programmable Device for Energy saving MCUs
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) MCU
Keyword(3) Memory
Keyword(4) Peripheral functions
Keyword(5) Programmable devices
Keyword(6) Sequencer
1st Author's Name Tetsuya Matsumura
1st Author's Affiliation College of Engineering, Nihon University()
2nd Author's Name Yoshifumi KAWAMURA
2nd Author's Affiliation Renesas Electronics Corporation
3rd Author's Name Naoya OKADA
3rd Author's Affiliation College of Science and Engineering, Kanazawa University
4th Author's Name Kazutami ARIMOTO
4th Author's Affiliation Faculty of Computer and Systems Engineering, Okayama Prefectual University
5th Author's Name Makino HIROSHI
5th Author's Affiliation Faculty of Information Science and Technology, Osaka Institute of Technology
6th Author's Name Yoshio MATSUDA
6th Author's Affiliation College of Science and Engineering, Kanazawa University
Date 2013-10-07
Paper # VLD2013-46,ICD2013-70,IE2013-46
Volume (vol) vol.113
Number (no) 236
Page pp.pp.-
#Pages 6
Date of Issue