| Presentation | 2014-01-28 Hardware Expansion Protocol in a Scalable Hardware System Daisuke WATANABE, Yusuke KATOH, Hironori NAKAJO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently hardware acceleration with using an FPGA are focused as well as prototyping an ASIC with it. The available number of logic cells and LUTs as well as decreasing operating frequency due to their growing utilization in a current FPGA are increasing limit the size of implemented hardware. Against the problem, a large sized circuit is partitioned and imlemented into several FPGAs. In this case communicating signal information among FPGAs is important. Focusing on the communication, we have introduced a Scalable Hardware System which realizes efficient partitioned circuits as well as Hardware Expansion Protocol to support the system. In this paper, our proposed Hardware Expansion Protocol is implemented between FPGAs and evaluated with an AES circuit. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Circuit Partitioning / Multi-FPGA |
| Paper # | VLD2013-107,CPSY2013-78,RECONF2013-61 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2014/1/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Hardware Expansion Protocol in a Scalable Hardware System |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Circuit Partitioning |
| Keyword(3) | Multi-FPGA |
| 1st Author's Name | Daisuke WATANABE |
| 1st Author's Affiliation | Tokyo University of Agriculture and Technology() |
| 2nd Author's Name | Yusuke KATOH |
| 2nd Author's Affiliation | Tokyo University of Agriculture and Technology |
| 3rd Author's Name | Hironori NAKAJO |
| 3rd Author's Affiliation | Tokyo University of Agriculture and Technology |
| Date | 2014-01-28 |
| Paper # | VLD2013-107,CPSY2013-78,RECONF2013-61 |
| Volume (vol) | vol.113 |
| Number (no) | 418 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |