Presentation 2014-01-28
A Discussion on Hardware Architecture of SIFT Algorithm for FPGAs Utilizing a High-Level Synthesis Tool
Naohisa ARAKAWA, Lint MENG, Tomonori IZUMI,
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Abstract(in English) SIFT is an algorithm to find and describe keypoints for image recognition. It is known to be robust for the change of scale, rotation, or light condition but needs too heavy computation for currently available embedded processors. Our objective is to develop a hardware accelerator of SIFT algorithm for embedded system equipped with reconfigurable hardware fabric, and this manuscript gives a fundamental discussion on the hardware architecture of our SIFT accelerator. We adopt high-level synthesis technology and derive the merit of flexibility and productivity in order to meet individual requirements of various image recognition systems. Starting with an extreme architecture which achieves full accuracy and maximum speed, we reduce the amount of registers and functional units down to 1/66 to fit middle or small-sized FPGAs, maintaining the accuracy and accepting 1/30 slower speed. We estimate that the reduced architecture still has the performance of 10fps or more frame rate for VGA size images at about 100MHz clock frequency.
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Keyword(in English) image recognition / SIFT / FPGA / high level synthesis / Impulse-C
Paper # VLD2013-105,CPSY2013-76,RECONF2013-59
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Committee RECONF
Conference Date 2014/1/21(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Discussion on Hardware Architecture of SIFT Algorithm for FPGAs Utilizing a High-Level Synthesis Tool
Sub Title (in English)
Keyword(1) image recognition
Keyword(2) SIFT
Keyword(3) FPGA
Keyword(4) high level synthesis
Keyword(5) Impulse-C
1st Author's Name Naohisa ARAKAWA
1st Author's Affiliation Graduate School of Science and Engineering, Ritsumeikan University()
2nd Author's Name Lint MENG
2nd Author's Affiliation Graduate School of Science and Engineering, Ritsumeikan University:College of Science and Engineering, Ritsumeikan University
3rd Author's Name Tomonori IZUMI
3rd Author's Affiliation Graduate School of Science and Engineering, Ritsumeikan University:College of Science and Engineering, Ritsumeikan University
Date 2014-01-28
Paper # VLD2013-105,CPSY2013-76,RECONF2013-59
Volume (vol) vol.113
Number (no) 418
Page pp.pp.-
#Pages 6
Date of Issue