| Presentation | 2013-08-01 Scaling Strategy for Low Power RF Applications with Multi Gate Oxide Dual Work function (DWF) MOSFETs Utilizing Self-Aligned Integration Scheme Toshitaka MIYATA, Shigeru KAWANAKA, Akira HOKAZONO, Tatsuya OHGURO, Yoshiaki TOYOSHIMA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Dual Work Function (DWF)-MOSFET of 100 nm gate length device with self-aligned integration scheme was demonstrated utilizing conventional CMOS platform process for the first time. Here, we obtained not only the improved transconductance (GM) and drain conductance (GD), but also the enlarged operation voltage window employing multi gate oxide structure combined with DWF-MOSFET gate stack. Also, the discriminative features of DWF-MOSFET operation were revealed by TCAD analysis indicating the potential ability of reduced power consumption for RF applications. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | RF transistor / Dual Work Function FET / DWF-FET / Multi Gate Oxide Dual Work Function / MGO-DWF-FET |
| Paper # | SDM2013-67,ICD2013-49 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
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| Conference Date | 2013/7/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Scaling Strategy for Low Power RF Applications with Multi Gate Oxide Dual Work function (DWF) MOSFETs Utilizing Self-Aligned Integration Scheme |
| Sub Title (in English) | |
| Keyword(1) | RF transistor |
| Keyword(2) | Dual Work Function FET |
| Keyword(3) | DWF-FET |
| Keyword(4) | Multi Gate Oxide Dual Work Function |
| Keyword(5) | MGO-DWF-FET |
| 1st Author's Name | Toshitaka MIYATA |
| 1st Author's Affiliation | Toshiba Corporation Semiconductor & Storage Products Company() |
| 2nd Author's Name | Shigeru KAWANAKA |
| 2nd Author's Affiliation | Toshiba Corporation Semiconductor & Storage Products Company |
| 3rd Author's Name | Akira HOKAZONO |
| 3rd Author's Affiliation | Toshiba Corporation Semiconductor & Storage Products Company |
| 4th Author's Name | Tatsuya OHGURO |
| 4th Author's Affiliation | Toshiba Corporation Semiconductor & Storage Products Company |
| 5th Author's Name | Yoshiaki TOYOSHIMA |
| 5th Author's Affiliation | Toshiba Corporation Semiconductor & Storage Products Company |
| Date | 2013-08-01 |
| Paper # | SDM2013-67,ICD2013-49 |
| Volume (vol) | vol.113 |
| Number (no) | 172 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |