| Presentation | 2013-09-19 A LUT Architecture Based on Partial Function of Shannon Expansion Kyosei YANAGIDA, Motoki AMAGASAKI, Masahiro IIDA, Morihiro KUGA, Toshinori SUEYOSHI, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In order to implement logic functions, conventional field programmable gate arrays (FPGAs) employs look-up tables (LUTs) as programmable logic cells. N-input LUTs can implement any N-input logic functions. However, LUT need many circuit resources to constitute. In this paper, we propose SLM based on the feature of Shannon Expansion. The experimental results show that the area in 7-SLM is 18% smaller than that in 7-LUT and the area in 8-SLM is 28% smaller than that in 8-LUT. 7-SLM provide the best area-delay product in all LUTs and SLMs. Further, the total number of conguration memory bits in 7-SLM is 31% smaller than the number of coniguration memory bits in 7-LUT. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / logic cell / LUT / Shannon Expansion |
| Paper # | RECONF2013-27 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2013/9/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A LUT Architecture Based on Partial Function of Shannon Expansion |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | logic cell |
| Keyword(3) | LUT |
| Keyword(4) | Shannon Expansion |
| 1st Author's Name | Kyosei YANAGIDA |
| 1st Author's Affiliation | Graduate School of Science and Technology, Kumamoto University() |
| 2nd Author's Name | Motoki AMAGASAKI |
| 2nd Author's Affiliation | Graduate School of Science and Technology, Kumamoto University |
| 3rd Author's Name | Masahiro IIDA |
| 3rd Author's Affiliation | Graduate School of Science and Technology, Kumamoto University |
| 4th Author's Name | Morihiro KUGA |
| 4th Author's Affiliation | Graduate School of Science and Technology, Kumamoto University |
| 5th Author's Name | Toshinori SUEYOSHI |
| 5th Author's Affiliation | Graduate School of Science and Technology, Kumamoto University |
| Date | 2013-09-19 |
| Paper # | RECONF2013-27 |
| Volume (vol) | vol.113 |
| Number (no) | 221 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |