Presentation 2013-09-18
A Restricted Dynamically Reconfigurable Architecture for Low Power Processors
Takeshi HIRAO, Dahoo KIM, ITARU Hida, Tetsuya ASAI, Masato MOTOMURA,
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Abstract(in English) Reconfigurable processors have widely attracted attention as an approach to realize high-performance and highly energy-efficient processors that map a target program's hot path to a reconfigurable data path. In this paper, we propose a Control-Flow Driven Data-Flow Switching (CDDS) variable data path architecture for embedded applications that demand extremely low power consumption in a wide range of uses. This architecture is characterized by following two features:(1) achieving both flexibility and low energy consumption by limiting the scope of the dynamic reconfiguration,(2) realizing smooth migration from the existing architecture by mapping the existing instruction sequence to the data path. Preliminary evaluation on small programs have revealed that the CDDS accelerator achieves approximately 3 to 6 times the performance/power improvements, compared to a base processor.
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Keyword(in English) Reconfigurable system / Processor architecture / Embedded system
Paper # RECONF2013-24
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Committee RECONF
Conference Date 2013/9/11(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Restricted Dynamically Reconfigurable Architecture for Low Power Processors
Sub Title (in English)
Keyword(1) Reconfigurable system
Keyword(2) Processor architecture
Keyword(3) Embedded system
1st Author's Name Takeshi HIRAO
1st Author's Affiliation Graduate School of Information Science and Technology(IST), Hokkaido University()
2nd Author's Name Dahoo KIM
2nd Author's Affiliation Graduate School of Information Science and Technology(IST), Hokkaido University
3rd Author's Name ITARU Hida
3rd Author's Affiliation Graduate School of Information Science and Technology(IST), Hokkaido University
4th Author's Name Tetsuya ASAI
4th Author's Affiliation Graduate School of Information Science and Technology(IST), Hokkaido University
5th Author's Name Masato MOTOMURA
5th Author's Affiliation Graduate School of Information Science and Technology(IST), Hokkaido University
Date 2013-09-18
Paper # RECONF2013-24
Volume (vol) vol.113
Number (no) 221
Page pp.pp.-
#Pages 6
Date of Issue