| Presentation | 2013-05-21 Performance Evaluation of Physical Unclonable Functions on Kintex-7 FPGA Yohei HORI, Toshihiro KATASHITA, Kazukuni KOBARA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The challenge-response properties of Physical Unclonable Functions (PUFs) on 28-nm process FPGA on the ten SASEBO-GIII boards are studied. PUF is a circuit that generates device-specific IDs by extracting the device variation. Even if PUFs are generated from the same configuration data, no device will generate the same ID from the same input owing to the device variation. However, it is unknown whether PUF is realizable using the state-of-the-art process since the technology of miniaturization and variation control of devices is advancing day by day. While there have been lots of reports on the PUFs using 40-nm and larger process devices, no study has dealt with smaller devices so far. To the best of authors' knowledge, this is the first report on the PUF on the 28-nm process FPGAs. In this paper, the infra-device reproducibility, inter-device uniqueness and other properties are evaluated and the feasibility of PUFs on 28-nm FPGA is discussed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Physical Unclonable Function(PUF) / Arbiter PUF / Pseudo-LFSR PUF(PL-PUF) / SASEBO-GIII / Kintex-7 / performance evaluation |
| Paper # | RECONF2013-17 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2013/5/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Performance Evaluation of Physical Unclonable Functions on Kintex-7 FPGA |
| Sub Title (in English) | |
| Keyword(1) | Physical Unclonable Function(PUF) |
| Keyword(2) | Arbiter PUF |
| Keyword(3) | Pseudo-LFSR PUF(PL-PUF) |
| Keyword(4) | SASEBO-GIII |
| Keyword(5) | Kintex-7 |
| Keyword(6) | performance evaluation |
| 1st Author's Name | Yohei HORI |
| 1st Author's Affiliation | Research Institute for Secure Systems(RISEC), National Institute of Advanced Industrial Science and Technology(AIST)() |
| 2nd Author's Name | Toshihiro KATASHITA |
| 2nd Author's Affiliation | Research Institute for Secure Systems(RISEC), National Institute of Advanced Industrial Science and Technology(AIST) |
| 3rd Author's Name | Kazukuni KOBARA |
| 3rd Author's Affiliation | Research Institute for Secure Systems(RISEC), National Institute of Advanced Industrial Science and Technology(AIST) |
| Date | 2013-05-21 |
| Paper # | RECONF2013-17 |
| Volume (vol) | vol.113 |
| Number (no) | 52 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |