| Presentation | 2013-05-21 Design and Evaluation of FPGA-based ASIC Emulator using High-speed Serial Communication Takashige UDA, Morihiro KUGA, Motoki AMAGASAKI, Masahiro IIDA, Toshinori SUEYOSHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently, development period of ASIC is longer becouse of the increase in circuit scale. Verification process accounts for a lot of development time among them, so shortening the verification period is desired. Currently, commercial FPGA-based ASIC emulator requires a cicuit partitioning when emulating a large-scale circuit. And it's emulation frequency is remarkably reduced. Currently, commercial FPGA-based emulator does not exist that more than emulation frequency of 10MHz or more and circuit scale of several hundreds of million ASIC gates have can be emulated. Therefore, this paper proposes the FPGA-based ASIC emulator that has the performance of the above by using a high-speed serial communication for data communication between the FPGAs. We discuss the feasible emulation frequency and circuit scale by the loop-back connection test of high-speed serial communication in a single FPGA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ASIC emulator / FPGA / High-speed Serial Communication / circuit partitioning |
| Paper # | RECONF2013-10 |
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| Committee | RECONF |
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| Conference Date | 2013/5/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design and Evaluation of FPGA-based ASIC Emulator using High-speed Serial Communication |
| Sub Title (in English) | |
| Keyword(1) | ASIC emulator |
| Keyword(2) | FPGA |
| Keyword(3) | High-speed Serial Communication |
| Keyword(4) | circuit partitioning |
| 1st Author's Name | Takashige UDA |
| 1st Author's Affiliation | Graduate School of Science and Technology, Kumamoto University() |
| 2nd Author's Name | Morihiro KUGA |
| 2nd Author's Affiliation | Graduate School of Science and Technology, Kumamoto University |
| 3rd Author's Name | Motoki AMAGASAKI |
| 3rd Author's Affiliation | Graduate School of Science and Technology, Kumamoto University |
| 4th Author's Name | Masahiro IIDA |
| 4th Author's Affiliation | Graduate School of Science and Technology, Kumamoto University |
| 5th Author's Name | Toshinori SUEYOSHI |
| 5th Author's Affiliation | Graduate School of Science and Technology, Kumamoto University |
| Date | 2013-05-21 |
| Paper # | RECONF2013-10 |
| Volume (vol) | vol.113 |
| Number (no) | 52 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |