| Presentation | 2013-05-20 Flexible reliability mixed-grained reconfigurable architecture supporting behavioral synthesis Hiroaki KONOURA, Dawood ALNAJJAR, Yukio MITSUYAMA, Hiroyuki OCHI, Takashi IMAGAWA, Shinichi NODA, Kazutoshi WAKABAYASHI, Masanori HASHIMOTO, Takao ONOYE, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper proposes a mixed-grained reconfigurable architecture that supports C-based behavioral synthesis and flexible reliability. Thanks to adopting fine-grained fabrics, a state machine, which is indispensable for behavioral synthesis through multi-step processing using dynamic reconfiguration, can be accommodated. Moreover, both fine-grained and coarse-grained fabrics can be configured for different levels of reliability depending on the reliability requirement of target applications. This architecture provides the trade-off between resource usage and latency. Through a case study of FFT implementation, we experimentally explore the appropriate number of implementable states on the array which determines the achievable trade-off between used silicon area and latency taking into account the configuration register overhead that is proportional to the number of implementable states. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | mixed-grain / behavioral synthesis / dynamic reconfiguration / area overhead / latency, trade-off |
| Paper # | RECONF2013-8 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2013/5/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Flexible reliability mixed-grained reconfigurable architecture supporting behavioral synthesis |
| Sub Title (in English) | |
| Keyword(1) | mixed-grain |
| Keyword(2) | behavioral synthesis |
| Keyword(3) | dynamic reconfiguration |
| Keyword(4) | area overhead |
| Keyword(5) | latency, trade-off |
| 1st Author's Name | Hiroaki KONOURA |
| 1st Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST CREST() |
| 2nd Author's Name | Dawood ALNAJJAR |
| 2nd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST CREST |
| 3rd Author's Name | Yukio MITSUYAMA |
| 3rd Author's Affiliation | School of Systems Engineering, Kochi University of Technology:JST CREST |
| 4th Author's Name | Hiroyuki OCHI |
| 4th Author's Affiliation | Graduate School of Information Science and Engineering, Ritsumeikan University:JST CREST |
| 5th Author's Name | Takashi IMAGAWA |
| 5th Author's Affiliation | Graduate School of Informatics, Kyoto University:JST CREST |
| 6th Author's Name | Shinichi NODA |
| 6th Author's Affiliation | NEC Corporation:JST CREST |
| 7th Author's Name | Kazutoshi WAKABAYASHI |
| 7th Author's Affiliation | NEC Corporation:JST CREST |
| 8th Author's Name | Masanori HASHIMOTO |
| 8th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST CREST |
| 9th Author's Name | Takao ONOYE |
| 9th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST CREST |
| Date | 2013-05-20 |
| Paper # | RECONF2013-8 |
| Volume (vol) | vol.113 |
| Number (no) | 52 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |