Presentation | 2013/1/23 Suppressing V_t and G_m Variability of FinFETs Using Amorphous Metal Gates for 14 nm and Beyond Takashi MATSUKAWA, Yongxun LIU, Wataru MIZUBAYASHI, Junichi TSUKADA, Hiromi YAMAUCHI, Kazuhiko ENDO, Yuki ISHIKAWA, Shinichi O'UCHI, Hiroyuki OTA, Shinji MIGITA, Yukinori MORITA, Meishoku MASAHARA, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Amorphous TaS1N metal gates (MGs) are successfully introduced in FinFETs to suppress work function vanation (WFV) of the MG, which is a dominant contributor to threshold voltage (V, ) variability of the undoped channel MG F1nFETs Companng with a poly-crystalline T1N gate, the TaS1N gate reduces V, variation drastically and records the smallest Avt value of 1 34 mVμn reported so far for MG FinFETs Interface traps also become a dominant Avt origin in the case of well-suppressed WFV using the amorphous MG The WFV suppression is also effective to reduce trans-conductance (Gm) variability which will be a dominant source of on-current (Ion) variability in 14 nm technology and beyond. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | FinFET / vanability / work function variation / amorphous metal gate |
Paper # | SDM2012-138 |
Date of Issue |
Conference Information | |
Committee | SDM |
---|---|
Conference Date | 2013/1/23(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Silicon Device and Materials (SDM) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Suppressing V_t and G_m Variability of FinFETs Using Amorphous Metal Gates for 14 nm and Beyond |
Sub Title (in English) | |
Keyword(1) | FinFET |
Keyword(2) | vanability |
Keyword(3) | work function variation |
Keyword(4) | amorphous metal gate |
1st Author's Name | Takashi MATSUKAWA |
1st Author's Affiliation | Nanoelectronics Research Institute, AIST() |
2nd Author's Name | Yongxun LIU |
2nd Author's Affiliation | Nanoelectronics Research Institute, AIST |
3rd Author's Name | Wataru MIZUBAYASHI |
3rd Author's Affiliation | Nanoelectronics Research Institute, AIST |
4th Author's Name | Junichi TSUKADA |
4th Author's Affiliation | Nanoelectronics Research Institute, AIST |
5th Author's Name | Hiromi YAMAUCHI |
5th Author's Affiliation | Nanoelectronics Research Institute, AIST |
6th Author's Name | Kazuhiko ENDO |
6th Author's Affiliation | Nanoelectronics Research Institute, AIST |
7th Author's Name | Yuki ISHIKAWA |
7th Author's Affiliation | Nanoelectronics Research Institute, AIST |
8th Author's Name | Shinichi O'UCHI |
8th Author's Affiliation | Nanoelectronics Research Institute, AIST |
9th Author's Name | Hiroyuki OTA |
9th Author's Affiliation | Nanoelectronics Research Institute, AIST |
10th Author's Name | Shinji MIGITA |
10th Author's Affiliation | Nanoelectronics Research Institute, AIST |
11th Author's Name | Yukinori MORITA |
11th Author's Affiliation | Nanoelectronics Research Institute, AIST |
12th Author's Name | Meishoku MASAHARA |
12th Author's Affiliation | Nanoelectronics Research Institute, AIST |
Date | 2013/1/23 |
Paper # | SDM2012-138 |
Volume (vol) | vol.112 |
Number (no) | 421 |
Page | pp.pp.- |
#Pages | 4 |
Date of Issue |